Datasheet > ISL98001

ISL98001

更新时间： 2022-12-13 09:45:04

品牌	Logo	应用领域
英特矽尔 - INTERSIL		/
页数	文件大小	规格书
29页	467K
描述
Triple Video Digitizer with Digital PLL

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ISL98001 数据手册

ISL98001

Ordering Information

MAXIMUM

TEMPERATURE

RANGE (°C)

PACKAGE

(Pb-free)

PART NUMBER (Note)

PART MARKING

PIXEL RATE (MHz)

PKG. DWG. #

MDP0055

ISL98001CQZ-140

ISL98001CQZ-170

ISL98001CQZ-210

ISL98001CQZ-240

ISL98001CQZ-275

ISL98001CQ-140 Z

ISL98001CQ-170 Z

ISL98001CQ-210 Z

ISL98001CQ-240 Z

ISL98001CQ-275 Z

140

170

210

240

275

0 to 70

128 MQFP

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil

Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC

J STD-020.

Block Diagram

V_CLAMP

Offset

DAC

ABLC™

R_IN1

R_IN2

V_IN+

V_IN-

R_P[7:0]

R_S[7:0]

8 bit ADC

PGA

V_CLAMP

Offset

DAC

ABLC™

G_IN1

RGB_GND1

V_IN+

V_IN-

G_P[7:0]

G_S[7:0]

8 bit ADC

G_IN2

RGB_GND2

V_CLAMP

Offset

DAC

ABLC™

B_IN1

B_IN2

V_IN+

V_IN-

B_P[7:0]

B_S[7:0]

8 bit ADC

DATACLK

SOG_IN1

SOG_IN2

HSYNC_IN1

Sync

AFE Configuration

and Control

HS_OUT

VS_OUT

HSYNC_IN2

VSYNC_IN1

Processing

VSYNC_IN2

HSYNC_OUT

VSYNC_OUT

CLOCKINV

Digital PLL

XTAL_IN

XTAL_OUT

XCLK_OUT

SCL

SDA

Serial

Interface

SADDR

FN6148.0

October 25, 2005

123 4 5 6 7...29

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