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ISL97642IRTZ-T PDF预览

ISL97642IRTZ-T

更新时间: 2024-02-01 11:28:36
品牌 Logo 应用领域
瑞萨 - RENESAS 开关
页数 文件大小 规格书
19页 791K
描述
TFT-LCD DC/DC with Integrated Amplifiers; TQFN32; Temp Range: -40° to 85°C

ISL97642IRTZ-T 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TQFN包装说明:HVQCCN,
针数:32Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.75模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:5.5 V最小输入电压:2.6 V
标称输入电压:3 VJESD-30 代码:S-PQCC-N32
JESD-609代码:e3长度:5 mm
湿度敏感等级:2功能数量:1
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C最大输出电流:3.3 A
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:0.8 mm表面贴装:YES
切换器配置:BOOST最大切换频率:1350 kHz
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:5 mmBase Number Matches:1

ISL97642IRTZ-T 数据手册

 浏览型号ISL97642IRTZ-T的Datasheet PDF文件第1页浏览型号ISL97642IRTZ-T的Datasheet PDF文件第2页浏览型号ISL97642IRTZ-T的Datasheet PDF文件第3页浏览型号ISL97642IRTZ-T的Datasheet PDF文件第5页浏览型号ISL97642IRTZ-T的Datasheet PDF文件第6页浏览型号ISL97642IRTZ-T的Datasheet PDF文件第7页 
ISL97642  
Electrical Specifications  
V
= 3V, V  
= V  
= 12V, V  
= 20V, Over-temperature from -40°C to +85°C.  
SRC  
IN  
BOOST  
SUP  
Unless Otherwise Specified. (Continued)  
PARAMETER  
DESCRIPTION CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
OPERATIONAL AMPLIFIERS  
V
Supply Operating Range  
Supply Current per Amplifier  
Offset Voltage  
4.5  
18  
800  
12  
V
µA  
SUP  
I
600  
3
SUP  
V
mV  
nA  
OS  
I
Input Bias Current  
-50  
0
+50  
B
CMIR  
Common Mode Input Range  
Common Mode Rejection Ratio  
Open Loop Gain  
V
V
SUP  
CMRR  
60  
90  
dB  
A
V
110  
dB  
OL  
Output Voltage High  
I
I
I
I
= 100µA  
= 5mA  
V
-15  
SUP  
V
-2  
SUP  
mV  
mV  
mV  
mV  
mA  
mA  
dB  
OH  
OUT  
OUT  
OUT  
OUT  
V
-250  
SUP  
V
-150  
SUP  
V
Output Voltage Low  
= -100µA  
= -5mA  
2
30  
OL  
100  
150  
I
I
Short-Circuit Current  
Continuous Output Current  
Power Supply Rejection Ratio  
-3dB Bandwidth  
100  
150  
SC  
CONT  
±50  
60  
PSRR  
BW  
100  
12  
8
MHz  
MHz  
V/µs  
-3dB  
GBWP  
Gain Bandwidth Product  
Slew Rate  
SR  
12  
POSITIVE LDO  
V
Positive Feedback Voltage  
I
I
= 100µA, T = +25°C  
A
1.176  
1.176  
0.82  
-50  
1.2  
1.2  
0.9  
1.224  
1.229  
0.98  
50  
V
V
FBP  
FTP  
DRVP  
= 100µA  
falling  
DRVP  
V
V
Fault Trip Level  
V
V
V
V
V
V
FBP  
FBP  
I
Positive LDO Input Bias Current  
FBP Load Regulation  
Sink Current  
= 1.4V  
nA  
%
BP  
FBP  
V  
/I  
POS POS  
= 25V, I  
= 0µA to 20µA  
= 10V  
0.5  
4
DRVP  
DRVP  
DRVP  
DRVP  
I
I
t
= 1.1V, V  
= 1.4V, V  
= 100nF  
2
mA  
µA  
ms  
DRVP  
FBP  
FBP  
P
DRVP Off Leakage Current  
Soft-Start Period  
= 30V  
0.1  
7
10  
LEAK  
P
C
DEL  
SS  
NEGATIVE LDO  
V
FBN Regulation Voltage  
I
I
= 0.2mA, T = +25°C  
A
0.173  
0.171  
380  
0.203  
0.203  
430  
0.233  
0.235  
480  
V
V
FBN  
DRVN  
DRVN  
= 0.2mA  
rising  
V
V
Fault Trip Level  
V
V
V
V
V
mV  
nA  
%
FTN  
FBN  
FBN  
I
Negative LDO Input Bias Current  
FBN Load Regulation  
Source Current  
= 250mV  
-50  
50  
BN  
FBN  
= -6V, I  
= 2µA to 20µA  
DRVN  
0.5  
4
DRVN  
I
I
t
= 500mV, V  
= -6V  
2
mA  
µA  
ms  
DRVN  
FBN  
FBP  
DRVN  
= 30V  
DRVP  
N
DRVN Off Leakage Current  
Soft-start Period  
= 1.35V, V  
= 100nF  
0.1  
7
10  
LEAK  
N
C
DEL  
SS  
V
V
V
-SLICE CIRCUIT  
ON  
CTL Input Low Voltage  
CTL Input High Voltage  
V
V
= 2.6V to 5.5V  
= 2.6V to 5.5V  
0.4V  
IN  
V
V
LO  
HI  
IN  
IN  
0.6V  
IN  
FN6436 Rev 0.00  
June 18, 2007  
Page 4 of 19  

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