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ISL32492E PDF预览

ISL32492E

更新时间: 2023-12-20 18:44:02
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
22页 1450K
描述
±60V Fault Protected, 5V, RS-485/RS-422 Transceivers with ±25V CMR and ESD Protection

ISL32492E 数据手册

 浏览型号ISL32492E的Datasheet PDF文件第14页浏览型号ISL32492E的Datasheet PDF文件第15页浏览型号ISL32492E的Datasheet PDF文件第16页浏览型号ISL32492E的Datasheet PDF文件第18页浏览型号ISL32492E的Datasheet PDF文件第19页浏览型号ISL32492E的Datasheet PDF文件第20页 
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E  
Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted.  
Please visit our website to make sure you have the latest revision.  
DATE  
REVISION  
FN7765.6  
CHANGE  
Feb 8, 2019  
Updated links throughout document.  
Updated ordering information table by adding all tape and reel information and updating notes.  
Updated last sentence in the “High Overvoltage (Fault) Protection Increases Ruggedness” section.  
Removed About Intersil section.  
Updated disclaimer.  
Sep 18, 2017  
Apr 20, 2015  
FN7765.5  
FN7786.4  
Added Related Literature section.  
Updated Receiving Truth Table on page 3.  
Applied Intersil A Renesas Company template.  
DRIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL32490E, ISL32492E) Changed MAX limit  
from “1200” to “1350” in “Driver Differential Rise or Fall Time” on page 6 that has -25V V 25V for  
CM  
test condition.  
DRIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL32493E, ISL32495E) Changed MAX limit from  
“400” to “550” in “Driver Differential Rise or Fall Time” on page 7 that has -25V V 25V for test  
CM  
condition.  
Oct 14, 2014  
Mar 7, 2012  
Nov 11, 2011  
FN7786.3  
FN7786.2  
FN7786.1  
On page 7, added “Note 17” reference to the Driver Differential Output Test condition.  
On page 9, added Note 17, “This parameter is not production tested.”  
On page 19 replaced M10.118 POD with latest revision.  
Updated Figure 16 on page 12 to show Pos breakdown between 60V and 70V.  
Updated Theta JA in “Thermal Information” on page 5 for 8 Ld SOIC from 116 to 108.  
Updated Package Outline Drawing on page 21. Changed Note 1 "1982" to "1994".  
Added 10 to “Pin Count” for ISL32490E, ISL32493E, ISL32496E in the Summary of Features table.  
Added 10 Ld MSOP option for ISL32490E, ISL32493E, ISL32496E in the “Ordering Information” table.  
Added 10 Ld MSOP pinout to “Pin Configurations” for ISL32490E, ISL32493E, ISL32496E.  
Added 10 Ld Pin # column in the “Pin Description” table.  
Added “(SOIC pin numbers shown)” in the “Typical Operating Circuits”.  
Added 10 Ld MSOP information in the “Thermal Resistance” section.  
Added 10 Ld MSOP package outline drawing.  
M8.118 on page 18- Corrected lead width dimension in side view 1 from "0.25 - 0.036" to "0.25 - 0.36"  
M8.15 on page 21- In Typical Recommended Land Pattern, changed the following:  
2.41(0.095) to 2.20(0.087)  
0.76 (0.030) to 0.60(0.023)  
0.200 to 5.20(0.205)  
Jan 18, 2011  
FN7786.0  
Initial release  
FN7786 Rev.6.00  
Feb 8, 2019  
Page 17 of 22  

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