ISL2671286
Absolute Maximum Ratings
Thermal Information
Any Pin to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
Analog Input to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +VCC+0.3V
Digital I/O to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +VCC+0.3V
External Reference Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6V
Maximum Current In to Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
ESD Rating
Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 8kV
Machine Model (Tested per JESD22-A115B) . . . . . . . . . . . . . . . . . 400V
Charged Device Model (Tested per JESD22-C101E). . . . . . . . . . . . .1.5kV
Latch Up (Tested per JESD78C; Class 2, Level A) . . . . . . . . . . . . . . . 100mA
Thermal Resistance (Typical)
8 Ld SOIC Package (Notes 4, 5). . . . . . . . . .
8 Ld PDIP Package (Notes 5, 6, 7). . . . . . .
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+100°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
θ
JA (°C/W)
120
θ
JC (°C/W)
64
66
120
Recommended Operating Conditions
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
5. For θ , the “case temp” location is taken at the package top center.
JC
6. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
7. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
Electrical Specifications +VCC = +5V, V
= +5V, f
= 12.5kHz, f = 16 • f
CLK SAMPLE
, unless otherwise noted. Typical
MAX
REF
SAMPLE
values are at T = +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C.
A
MIN
SYMBOL
PARAMETER
TEST CONDITIONS
(Note 8)
TYP
(Note 8)
UNITS
ANALOG INPUT (Note 9)
|AIN|
Full-Scale Input Range
Absolute Input Voltage
+IN – (–IN)
+IN
0
VREF
+VCC +0.2
+0.2
V
V
-0.2
-0.2
–IN
V
C
Input Capacitance
Track/Hold mode
19/1.8
0.01
pF
µA
IN
I
Input DC Leakage Current (Note 10)
-1
1
LEAK
SYSTEM PERFORMANCE
N
Resolution
12
Bits
Bits
LSB
LSB
LSB
LSB
dB
No Missing Codes
Integral Linearity
Differential Linearity
Zero-Code Error
Gain Error
Guaranteed no missed codes
12
-1
INL
DNL
±0.5
±0.4
±0.1
±0.2
82
1
0.75
3
-0.75
-3
OFFSET
GAIN
-8
8
PSRR
Power Supply Rejection
SAMPLING DYNAMICS
t
Conversion Time
12
Clk Cycles
Clk Cycles
kHz
CONV
t
Acquisition Time
1.5
ACQ
SSBW
Small Signal Bandwidth
320
DYNAMIC CHARACTERISTICS
THD
Total Harmonic Distortion
AIN = 5.0V at f = 1kHz
PP IN
-82
-83
72
dB
dB
dB
dB
AIN = 5.0V at f = 5kHz
PP IN
SINAD
SFDR
Signal-to (Noise + Distortion) Ratio AIN = 5.0V at f = 1kHz
P-P IN
Spurious Free Dynamic Range
AIN = 5.0V at f = 1kHz
P-P IN
83
FN7863.0
November 1, 2011
3
5秒后页面跳转
资料手册解读：UC3842参数和管脚说明
一文带你了解无源晶振的负载电容为何要加两颗谐振电容CL1和CL2
玻璃管保险丝与陶瓷管保险丝：区别与替代性探讨
PCF8574资料解读：主要参数分析、引脚说明
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
