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IRS2153D PDF预览

IRS2153D

更新时间： 2024-01-23 09:27:49
品牌 Logo 应用领域
英飞凌 - INFINEON 驱动器
页数 文件大小 规格书
12页 271K
描述
SELF-OSCILLATING HALF-BRIDEGE DRIVER IC

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IRS2153D 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Transferred零件包装代码：SOIC
包装说明：LEAD FREE, PLASTIC, MS-012AA, SOIC-8针数：8
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.31.00.01风险等级：3.01
内置保护：UNDER VOLTAGE接口集成电路类型：HALF BRIDGE BASED PERIPHERAL DRIVER
JESD-30 代码：R-PDSO-G8JESD-609代码：e3
长度：4.9 mm湿度敏感等级：2
功能数量：1端子数量：8
最高工作温度：125 °C最低工作温度：-40 °C
输出电流流向：SOURCE AND SINK封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：14 V
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：MOSFET Drivers最大供电电压：15.4 V
最小供电电压：10.1 V标称供电电压：14 V
表面贴装：YES技术：CMOS
温度等级：AUTOMOTIVE端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：3.9 mmBase Number Matches：1

IRS2153D 数据手册

 浏览型号IRS2153D的Datasheet PDF文件第5页浏览型号IRS2153D的Datasheet PDF文件第6页浏览型号IRS2153D的Datasheet PDF文件第7页浏览型号IRS2153D的Datasheet PDF文件第9页浏览型号IRS2153D的Datasheet PDF文件第10页浏览型号IRS2153D的Datasheet PDF文件第11页 
IRS2153D(S)PbF  
Bootstrap MOSFET  
Functional Description  
The internal bootstrap FET and supply capacitor (CBOOT  
)
comprise the supply voltage for the high side driver circuitry. The  
internal boostrap FET only turns on when LO is high. To  
guarantee that the high-side supply is charged up before the first  
pulse on pin HO, the first pulse from the output drivers comes  
from the LO pin.  
Under-voltage Lock-Out Mode (UVLO)  
The under-voltage lockout mode (UVLO) is defined as the state  
the IC is in when VCC is below the turn-on threshold of the IC.  
The IRS2153D under voltage lock-out is designed to maintain an  
ultra low supply current of less than 155uA, and to guarantee the  
IC is fully functional before the high and low side output drivers  
are activated. During under voltage lock-out mode, the high and  
low-side driver outputs HO and LO are both low.  
Normal operating mode  
Once the VCCUV+ threshold is passed, the MOSFET M1 opens,  
RT increases to approximately VCC (VCC-VRT+) and the  
external CT capacitor starts charging. Once the CT voltage  
reaches VCT- (about 1/3 of VCC), established by an internal  
resistor ladder, LO turns on with a delay equivalent to the  
deadtime td. Once the CT voltage reaches VCT+ (approximately  
2/3 of VCC), LO goes low, RT goes down to approximately  
ground (VRT-), the CT capacitor discharges and the deadtime  
circuit is activated. At the end of the deadtime, HO goes high.  
Once the CT voltage reaches VCT-, HO goes low, RT goes high  
again, the deadtime is activated. At the end of the deadtime, LO  
goes high and the cycle starts over again.  
Supply voltage  
+ AC Rectified Line  
RVCC  
VCC  
RT  
VB  
HO  
VS  
LO  
1
2
3
4
8
7
6
5
CBOOT  
MHS  
RT  
CT  
L
The following equation provides the oscillator frequency:  
CVCC  
CT  
COM  
RL  
MLS  
1
f ~  
1.453× RT ×CT  
- AC Rectified Line  
Fig. 1 Typical Connection Diagram  
1 shows an example of supply voltage. The start-up  
This equation can vary slightly from actual measurements due to  
internal comparator over- and under-shoot delays. For a more  
accurate determination of the output frequency, the frequency  
characteristic curves should be used (RT vs. Frequency, Page 3).  
Fig.  
capacitor (CVCC) is charged by current through supply resistor  
(RVCC) minus the start-up current drawn by the IC. This resistor is  
chosen to provide sufficient current to supply the IRS2153D from  
the DC bus. CVCC should be large enough to hold the voltage at  
Vcc above the UVLO threshold for one half cycle of the line  
voltage as it will only be charged at the peak, typically 0.1uF. It  
will be necessary for RVCC to dissipate around 1W.  
Shut-down  
If CT is pulled down below  
(approximately 1/6 of VCC) by  
V
CTSD  
an external circuit, CT doesn’t charge up and oscillation stops.  
LO is held low and the bootstrap FET is off. Oscillation will  
resume once CT is able to charge up again to VCT-.  
The use of a two diode charge pump made of DC1, DC2 and  
CVS (Fig. 2) from the half bridge (VS) is also possible however  
the above approach is simplest and the dissipation in RVCC should  
not be unacceptably high.  
+ AC Rectified Line  
RVCC  
VCC  
RT  
VB  
HO  
VS  
LO  
1
2
3
4
8
7
6
5
CBOOT  
MHS  
DC2  
RT  
CT  
L
CVCC  
CVS  
CT  
COM  
RL  
MLS  
DC1  
- AC Rectified Line  
Fig. 2 Charge pump circuit  
The supply resistor (RVCC) must be selected such that enough  
supply current is available over all operating conditions.  
Once the capacitor voltage on VCC reaches the start-up  
threshold VCCUV+, the IC turns on and HO and LO begin to  
oscillate.  
8
1...56789101112

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