Datasheet > IN74HCT132AN

IN74HCT132AN

更新时间： 2024-02-18 07:27:58

品牌	Logo	应用领域
IKSEMICON		触发器栅
页数	文件大小	规格书
5页	248K
描述
Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High-Performance Silicon-Gate CMOS

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技术参数
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IN74HCT132AN 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84

IN74HCT132AN 数据手册

IN74HCT132A

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

V_CC

Guaranteed Limit

Symbol

Parameter

Test Conditions

Unit

25 °C ≤85 ≤125

°C

-55°C

V_T+max Maximum Positive-

Going Input Threshold

Voltage

V_OUT=0.1 V

⎢I_OUT⎢≤ 20 µA

4.5

5.5

1.9

2.1

1.9

2.1

1.9

2.1

V_T+min Minimum Positive-

Going Input Threshold

Voltage

V_OUT=0.1 V

⎢I_OUT⎢ ≤ 20 µA

4.5

5.5

1.2

1.4

1.2

1.4

1.2

1.4

V_T-max Maximum Negative-

Going Input Threshold

Voltage

V_OUT=V_CC-0.1 V

⎢I_OUT⎢≤ 20 µA

4.5

5.5

1.2

1.4

1.2

1.4

1.2

1.4

V_T-min

Minimum Negative-

Going Input Threshold

Voltage

V_OUT=V_CC-0.1 V

⎢I_OUT⎢ ≤ 20 µA

4.5

5.5

0.5

0.6

0.5

0.6

0.5

0.6

V_Hmax

Note

Maximum Hysteresis

Voltage

V_OUT=0.1 V or V_CC-0.1 V

⎢I_OUT⎢ ≤ 20 µA

4.5

5.5

1.4

1.5

1.4

1.5

1.4

1.5

V_Hmin

Note

Minimum Hysteresis

Voltage

V_OUT=0.1 V or V_CC-0.1 V

⎢I_OUT⎢ ≤ 20 µA

4.5

5.5

0.4

V_OH

Minimum High-Level

Output Voltage

4.5

5.5

4.4

5.4

4.4

5.4

4.4

5.4

V_IN≤V_T-min or V_T+max

⎢I_out⎢ ≤ 20 µA

V_IN≤V_T-min or V_T+max

⎢I_OUT⎢ ≤ 4.0 mA

4.5

3.98

3.84

3.7

⎢I_OUT⎢ ≤ 5.2 mA

V_OL

Maximum Low-Level

Output Voltage

4.5

5.5

0.1

V_IN≥V_T+max

⎢I_OUT⎢ ≤ 20 µA

V_IN≥ V_T+max

⎢I_OUT⎢ ≤ 4.0 mA

⎢I_OUT⎢ ≤ 5.2 mA

4.5

0.26

0.33

0.4

I_IN

Maximum Input

Leakage Current

V_IN=V_CCor GND

5.5

±0.1

±1.0 ±1.0

µA

I_CC

Maximum Quiescent

Supply Current

(per Package)

V_IN=V_CCor GND

1.0

_OUT=0µA

Additional Quiescent

Supply Current

V_IN= 2.4 V, Any One Input

V_IN=V_CCor GND, Other

Inputs

∆I_CC

≥-55°C

25°C to

125°C

5.5

2.9

2.4

I_OUT=0µA

Note. V_Hmin>(V_T+min)-(V_T-max); V_Hmax=(V_T+max)+(V_T-min).

Rev. 00

1 234 5

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