Datasheet > IN74HCT132AD

IN74HCT132AD

更新时间： 2024-02-25 11:53:27

品牌	Logo	应用领域
IKSEMICON		触发器栅
页数	文件大小	规格书
5页	248K
描述
Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High-Performance Silicon-Gate CMOS

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IN74HCT132AD 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84

IN74HCT132AD 数据手册

IN74HCT132A

MAXIMUM RATINGS^*

Symbol

Parameter

Value

-0.5 to +7.0

-1.5 to V_CC+1.5

-0.5 to V_CC+0.5

±20

Unit

V_CC

V_IN

V_OUT

I_IN

DC Supply Voltage (Referenced to GND)

DC Input Voltage (Referenced to GND)

DC Output Voltage (Referenced to GND)

DC Input Current, per Pin

I_OUT

I_CC

DC Output Current, per Pin

±25

DC Supply Current, V_CCand GND Pins

±50

P_D

Power Dissipation in Still Air, Plastic DIP+

SOIC Package+

750

500

Tstg

T_L

Storage Temperature

-65 to +150

260

°C

Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP or SOIC Package)

^*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol

V_CC

Parameter

Min

4.5

Max

5.5

Unit

DC Supply Voltage (Referenced to GND)

DC Input Voltage, Output Voltage (Referenced to GND)

Operating Temperature, All Package Types

Input Rise and Fall Time (Figure 1)

V_IN, V_OUT

T_A

V_CC

+125

-55

°C

t_r, t_f

limit^*

^*When V_IN≈ 0.5V_CC, I_CC> > quiescent current.

This device contains protection circuitry to guard against damage due to high static voltages or electric fields.

However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this

high-impedance circuit. For proper operation, V_INand V_OUTshould be constrained to the range GND≤(V_INor

_OUT)≤V_CC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V_CC). Unused

outputs must be left open.

Rev. 00

123 4 5

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