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IMP706PCPA PDF预览

IMP706PCPA

更新时间: 2024-01-16 11:23:34
品牌 Logo 应用领域
IMP 监控
页数 文件大小 规格书
8页 227K
描述
3/3.3/4.0V レP SUPERVISOR CIRCUITS

IMP706PCPA 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknown风险等级:5.7
Is Samacsys:NBase Number Matches:1

IMP706PCPA 数据手册

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IMP706P/R/S/T/J, IMP708R/S/T/J  
Pin Descriptions  
Pin Number  
IMP706R/S/T/J IMP708R/S/T/J  
DIP/SO MicroSO DIP/SO MicroSO DIP/SO MicroSO Name  
IMP706P  
Function  
Manual reset input. The active LOW input triggers  
a reset pulse. It is pulled HIGH by a 20kpull-up  
resistor. It is compatible with TTL/CMOS signals  
when VCC = 5V. It can be shorted to ground  
through a mechanical switch. Leave floating or  
connect to VCC if the function is not used.  
1
3
1
3
1
3
MR  
2
3
4
5
2
3
4
5
2
3
4
5
VCC  
GND  
Monitored power supply input.  
Ground  
Power-fail input voltage monitor. With PFI less than  
1.25V, PFO goes LOW. Connect PFI to ground  
when not used.  
Power-fail output. The output is active LOW and  
sinks current when PFI is less than 1.25V. If not  
used, leave the pin unconnected.  
4
5
6
7
4
5
6
7
4
5
6
7
PFI  
PFO  
Watchdog input. WDI controls the internal watchdog  
timer. A HIGH or LOW signal for 1.6 sec at WDI  
allows the internal timer to run-out, setting WDO low.  
A rising or falling edge must occur at WDI within  
1.6 seconds or WDO goes LOW. The watchdog  
function is disabled by floating WDI. The internal  
watchdog timer clears when: RESET is asserted;  
WDI is three-stated; or WDI sees a rising or falling edge.  
6
8
6
8
WDI  
6
7
8
1
NC  
Not connected.  
Active-LOW reset output. Pulses LOW for 200ms  
when triggered, and stays LOW whenever VCC is  
below the reset threshold. RESET remains LOW for  
200ms after VCC rises above the RESET threshold  
or MR goes from HIGH to LOW. A watchdog timeout  
will not trigger RESET unless WDO is connected to MR.  
7
1
RESET  
Watchdog output.  
goes LOW when the 1.6  
WDO  
second internal watchdog timer times-out and does  
not go HIGH until a transition occurs at WDI. In  
addition, when VCC falls below the reset threshold,  
WDO goes LOW. Unlike RESET, WDO does not have  
a minimum pulse width and as soon as VCC exceeds  
the reset threshold, WDO becomes HIGH with no delay.  
8
7
2
1
8
2
WDO  
8
2
RESET  
Active-HIGH reset output. RESET is the inverse of  
RESET.  
Feature Summary  
IMP706P IMP706R IMP706S IMP706T IMP706J IMP708R IMP708S IMP708T IMP708J  
Power-fail detector  
Brownout detection  
Debounced manual RESET input  
Power-up/down RESET  
Watchdog timer  
Active-HIGH RESET  
Active-LOW RESET  
Active-LOW and HIGH RESETs  
RESET threshold  
2.63V  
2.63V  
2.93V  
3.08V  
4.00V  
2.63V  
2.93V  
3.08V  
4.00V  
©
1999 IMP, Inc.  
408-432-9100/www.impweb.com  
5

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