IMP5226

更新时间： 2024-01-16 15:15:01

品牌	Logo	应用领域
A1PROS		/
页数	文件大小	规格书
6页	149K
描述
18--Liine Pllug and Pllay SCSII Termiinattor

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技术参数
数据手册

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IMP5226 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.68
Base Number Matches：	1

IMP5226 数据手册

IMP5226

DATA

OMMUNICATIONS

Key Features

18-Line Plug and Play

SCSI Terminator

ꢀ

Ultra-Fast response for Fast-20 SCSI

The 18-channel IMP5226 SCSI terminator is part of IMP's family of high-

performance SCSI terminators that deliver true UltraSCSI performance.

The BiCMOS design offers superior performance over first generation

linear regulator/ resistor based terminators.

35MHz channel bandwidth

Sleep-mode current less than 150µA

— Disconnects terminator from lows

ꢀ

NO external compensation capacitors

Compatible with active negation drivers

Compatible with passive and active terminations

IMP's new architecture employs high-speed adaptive elements for each

channel, thereby providing the fastest response possible - typically

35MHz, which is 100 times faster than the older linear regulator termi-

nator approach. The bandwidth of terminators based on the older

regulator/ resistor terminator architecture is limited to 500kHz since a

large output stabilization capacitor is required.

Approved for use with SCSI 1, 2, 3 and

Ultra SCSI

ꢀ

Hot-swap compatible

The IMP architecture eliminates the external output compensation

capacitor and the need for transient output capacitors while maintaining

pin compatibility with first generation designs. Reduced component

count is inherent with the IMP5226.

Pin-for-pin compatible with LX5226, LX5207

and UCC5610

IMP SCSI Terminators

The IMP5226 architecture tolerates marginal system designs. A key

improvement offered by the IMP5226 lies in its ability to insure reliable,

error-free communications even in systems which do not adhere to rec-

ommended SCSI hardware design guidelines, such as improper cable

lengths and impedance. Frequently, this situation is not controlled by the

peripheral or host designer.

Part

Channels

Type

IMP5111

IMP5112

IMP5115

IMP5121

IMP5218

IMP5219

IMP5225

IMP5226

IMP5241

IMP5242

The IMP5226 can be placed in a sleep mode with a high logic signal. In

the sleep mode the outputs are in a high impedance state. Quiescent cur-

rent is less than 150µA when disabled.

The IMP5226 is a superior pin-for-pin replacement for the LX5226,

LX5207, UC5601/ 5602 and the UCC5610.

SE/LVD

5226_t06.eps

Block Diagrams

Term Power

24mA Current

Limiting Circuit

DATA OUTPUT

PIN DB (0)

Thermal

Limiting

Circuit

Current

Biasing

Circuit

V_TERM

2.85V

DISCONNECT

–

1 of 18 Channels

1.4V

5226_01.eps

12 3 4 5 6

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