Datasheet > IMP16C552-CJ68

IMP16C552-CJ68

更新时间： 2022-11-27 00:24:59

品牌	Logo	应用领域
IMP		先进先出芯片
页数	文件大小	规格书
34页	752K
描述
Dual Universal Asynchronous Receiver/Transmitter (UART) with 16-BYTE FIFO & Parallel Printer Port

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IMP16C552-CJ68 数据手册

IMP16C552

Data Communications

Dual Universal Asynchronous

Receiver/Transmitter (UART)

with 16-BYTE FIFO & Parallel Printer Port

Key Features

ꢀ

Fully prioritized independent interrupt

system controls for each channel

ꢀ

Two fully programmable serial 1/0

channels (DC TO 512K BAUD )

16byte FIFO buffers on both transmit

and receive of each channel to reduce

number of interrupts presented to the

CPU

Tri-state TTL drive capabilities for

bi-directional data bus and control bus

on each channel

ꢀ

Loopback control for communications

link fault isolation for each UART

ꢀ

Programmable FIFO threshold loves

of 1,4,8,or 14,bytes on each channel

Line break generation and detection

for each UART

Two modes of

available for

DMA

transfer

signaling

of data

Complete status reporting capabilities

characters to and from FIFO buffers

Fully bi-directional centronics

compatible parallel port direct printer

interface

Generation and stripping of serial

asynchronous data control bits

(start ,stop parity )

ꢀ

Programmable baud rate generator ꢀ Advanced

CMOS

low

power

and modem control signals for each

channel

technology with single +5voit supply

ꢀ

68-pin PLCC package

Pin Configuration

DSR*D

INT2

SLIN*+

INIT*+

AFD*+

STB*+

VSS

PD0

PD1

PD2

PD3

PD4

PD5

PD6

PD7

INT0

BDO

SOUT1

DTR1*

RTS1*

DSR1*

16C552

IMP

TXRdy0*

VCC

RTS0*

DTR0*

SOUT0

408-432-9100/ www.impweb.com

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IMP16C554-CJ68	IMP	Quad Universal Asynchronous Receiver/Transmitter (UART) with FIFOs	获取价格
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