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IHLP-5050CE-01_06 PDF预览

IHLP-5050CE-01_06

更新时间: 2024-01-27 18:09:29
品牌 Logo 应用领域
威世 - VISHAY 电感器
页数 文件大小 规格书
5页 167K
描述
Low Profile, High Current Inductor

IHLP-5050CE-01_06 数据手册

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IHLP-5050CE-01  
Vishay Dale  
Low Profile, High Current Inductor  
FEATURES  
Lowest height (3.5 mm) in this package footprint  
Shielded construction  
Frequency range up to 5.0 MHz  
Lowest DCR/µH, in this package size  
RoHS  
Handles high transient current spikes without saturation COMPLIANT  
Ultra low buzz noise, due to composite construction  
100 % lead (Pb)-free and RoHS compliant  
APPLICATIONS  
PDA/Notebook/Desktop/Server applications  
High current POL converters  
Low profile, high current power supplies  
Battery powered devices  
DC/DC converters in distributed power systems  
Manufactured under one or more of the following:  
US Patents; 6,198,375/6,204,744/6,449,829/6,460,244.  
Several foreign patents, and other patents pending.  
DC/DC converter for Field Programmable Gate Array (FPGA)  
STANDARD ELECTRICAL SPECIFICATIONS  
DIMENSIONS in inches [millimeters]  
Lo  
HEATRATING SATURATION  
Typical Pad Layout  
0.542  
[13.76ꢀ  
INDUCTANCE  
µH 20 % at  
DCRm  
TYPICAL  
25 °C  
Ω
DCRm  
MAX  
Ω
CURRENT  
DC AMPS3)  
TYPICAL  
CURRENT  
DC AMPS4)  
TYPICAL  
0.508  
[12.9ꢀ  
Max.  
0.195  
[4.95ꢀ  
100 kHz, 0.25 V, 0 A  
25 °C  
0.310  
[7.87ꢀ  
0.10  
0.15  
0.22  
0.33  
0.47  
0.60  
0.68  
0.82  
0.8  
1
0.96  
1.2  
1.3  
1.5  
2
2.2  
2.5  
3
43  
41  
38.5  
36.5  
32  
29  
28  
84  
75  
65  
62  
55  
51  
49  
44  
0.138  
[3.5ꢀ Max.  
0.091 0.01  
[2.3 0.3ꢀ  
1.1  
1.3  
1.6  
1.8  
2.3  
2.6  
0.185 0.01  
[4.7 0.3ꢀ  
25  
1.0  
1.5  
1.8  
2.2  
3.3  
4.7  
5.6  
6.8  
8.2  
10  
3.3  
5.1  
6.5  
7.2  
11  
14.3  
18.3  
19.8  
24.8  
30.4  
3.5  
5.5  
7
24  
19  
16.5  
16  
12  
10  
9.5  
9
40  
35  
30  
29  
27  
24  
19  
18  
16  
14  
0.520 0.015  
[13.2 0.38ꢀ Max.  
The diagram above applies to values 0.6 µH and below.  
8
12  
15  
19  
22  
28  
34  
Typical Pad Layout  
0.542  
[13.8ꢀ  
0.508  
[12.9ꢀ  
0.128 [3.3ꢀ  
Max.  
0.318  
[8.1ꢀ  
8.5  
7
0.138  
[3.5ꢀ Max.  
NOTES:  
0.087 0.01  
[2.2 0.254ꢀ  
1. All test data is referenced to 25 °C ambient  
2. Operating Temperature Range - 55 °C to + 125 °C  
0.118 0.01  
[3.0 0.3ꢀ  
3. DC current (A) that will cause an approximate ΔT of 40 °C  
4. DC current (A) that will cause Lo to drop approximately 20 %  
5. The part temperature (ambient + temp rise) should not exceed  
125 °C under worst case operating conditions. Circuit design,  
component placement, PWB trace size and thickness, airflow  
and other cooling provisions all affect the part temperature. Part  
temperature should be verified in the end application.  
0.520 0.015  
[13.2 0.38ꢀ  
The diagram above applies to values 0.68 µH and above.  
DESCRIPTION  
e3  
IHLP-5050CE-01  
1.0 µH  
20 %  
ER  
MODEL  
INDUCTANCE  
TOLERANCE  
INDUCTANCE  
VALUE  
PACKAGE  
CODE  
JEDEC LEAD (Pb)-FREE  
STANDARD  
GLOBAL PART NUMBER  
I
H
L
P
5
0
5
0
C
E
E
R
1
R
0
M
0
1
PACKAGE  
CODE  
INDUCTANCE  
VALUE  
INDUCTANCE SERIES  
TOLERANCE  
PRODUCT FAMILY  
SIZE  
www.vishay.com  
50  
For technical questions, contact: magnetics@vishay.com  
Document Number: 34105  
Revision: 10-Aug-06  

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