IDT82V3155 ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS
INDUSTRIAL TEMPERATURE
LIST OF FIGURES
Figure - 1
Figure - 2
Figure - 3
Figure - 4
Figure - 5
Figure - 6
Figure - 7
Figure - 8
Figure - 9
IDT82V3155 SSOP56 Package Pin Assignment ................................................................................................................................ 2
State Control Circuit ............................................................................................................................................................................ 9
State Control Diagram......................................................................................................................................................................... 9
TIE Control Block Diagram................................................................................................................................................................ 11
Reference Switch with TIE Control Block Enabled............................................................................................................................ 12
Reference Switch with TIE Control Block Disabled........................................................................................................................... 12
DPLL Block Diagram......................................................................................................................................................................... 13
Clock Oscillator Circuit ...................................................................................................................................................................... 14
Power-Up Reset Circuit..................................................................................................................................................................... 14
Figure - 10 Timing Parameter Measurement Voltage Levels .............................................................................................................................. 25
Figure - 11 Input to Output Timing (Normal Mode).............................................................................................................................................. 27
Figure - 12 Output Timing 1................................................................................................................................................................................. 28
Figure - 13 Output Timing 2................................................................................................................................................................................. 29
Figure - 14 Input Control Setup and Hold Timing ................................................................................................................................................ 29
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