IDT82P2821
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
3.5 DIAGNOSTIC FACILITIES ....................................................................................................................................... 43
3.5.1 Bipolar Violation (BPV) / Code Violation (CV) Detection and BPV Insertion .............................................. 43
3.5.1.1 Bipolar Violation (BPV) / Code Violation (CV) Detection ............................................................. 43
3.5.1.2 Bipolar Violation (BPV) Insertion ................................................................................................. 43
3.5.2 Excessive Zeroes (EXZ) Detection ............................................................................................................. 43
3.5.3 Loss of Signal (LOS) Detection ................................................................................................................... 44
3.5.3.1 Line LOS (LLOS) ......................................................................................................................... 44
3.5.3.2 System LOS (SLOS) ................................................................................................................... 45
3.5.3.3 Transmit LOS (TLOS) ................................................................................................................. 46
3.5.4 Alarm Indication Signal (AIS) Detection and Generation ............................................................................ 47
3.5.4.1 Alarm Indication Signal (AIS) Detection ...................................................................................... 47
3.5.4.2 (Alarm Indication Signal) AIS Generation ................................................................................... 47
3.5.5 PRBS, QRSS, ARB and IB Pattern Generation and Detection ................................................................... 48
3.5.5.1 Pattern Generation ...................................................................................................................... 48
3.5.5.2 Pattern Detection ........................................................................................................................ 49
3.5.6 Error Counter .............................................................................................................................................. 50
3.5.6.1 Automatic Error Counter Updating .............................................................................................. 50
3.5.6.2 Manual Error Counter Updating .................................................................................................. 51
3.5.7 Receive /Transmit Multiplex Function (RMF / TMF) Indication ................................................................... 52
3.5.7.1 RMFn Indication .......................................................................................................................... 52
3.5.7.2 TMFn Indication .......................................................................................................................... 53
3.5.8 Loopback .................................................................................................................................................... 54
3.5.8.1 Analog Loopback ........................................................................................................................ 54
3.5.8.2 Remote Loopback ....................................................................................................................... 55
3.5.8.3 Digital Loopback .......................................................................................................................... 56
3.5.8.4 Dual Loopback ............................................................................................................................ 57
3.5.9 Channel 0 Monitoring .................................................................................................................................. 59
3.5.9.1 G.772 Monitoring ......................................................................................................................... 59
3.5.9.2 Jitter Measurement (JM) ............................................................................................................. 60
3.6 CLOCK INPUTS AND OUTPUTS ............................................................................................................................ 61
3.6.1 Free Running Clock Outputs on CLKT1/CLKE1 ......................................................................................... 61
3.6.2 Clock Outputs on REFA/REFB ................................................................................................................... 62
3.6.2.1 REFA/REFB in Clock Recovery Mode ........................................................................................ 62
3.6.2.2 Frequency Synthesizer for REFA Clock Output .......................................................................... 62
3.6.2.3 Free Run Mode for REFA Clock Output ...................................................................................... 62
3.6.2.4 REFA/REFB Driven by External CLKA/CLKB Input .................................................................... 62
3.6.2.5 REFA and REFB in Loss of Signal (LOS) or Loss of Clock Condition ........................................ 62
3.6.3 MCLK, Master Clock Input .......................................................................................................................... 66
3.6.4 XCLK, Internal Reference Clock Input ........................................................................................................ 66
3.7 INTERRUPT SUMMARY ......................................................................................................................................... 67
4 MISCELLANEOUS .......................................................................................................................................................... 69
4.1 RESET ..................................................................................................................................................................... 69
4.1.1 Power-On Reset ......................................................................................................................................... 70
4.1.2 Hardware Reset .......................................................................................................................................... 70
4.1.3 Global Software Reset ................................................................................................................................ 70
Table of Contents
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January 11, 2007
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