IDT82P2816
16(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Figure-49 CLKE1 Clock Timing Diagram ................................................................................................................................................................... 127
Figure-50 E1 Jitter Tolerance Performance ............................................................................................................................................................... 129
Figure-51 T1/J1 Jitter Tolerance Performance .......................................................................................................................................................... 129
Figure-52 E1 Jitter Transfer Performance ................................................................................................................................................................. 130
Figure-53 T1/J1 Jitter Transfer Performance ............................................................................................................................................................. 130
Figure-54 Read Operation in Serial Microprocessor Interface .................................................................................................................................. 131
Figure-55 Write Operation in Serial Microprocessor Interface ................................................................................................................................... 131
Figure-56 Timing Diagram ......................................................................................................................................................................................... 132
Figure-57 Parallel Motorola Non-Multiplexed Microprocessor Interface Read Cycle ................................................................................................ 133
Figure-58 Parallel Motorola Non-Multiplexed Microprocessor Interface Write Cycle ................................................................................................ 134
Figure-59 Parallel Intel Non-Multiplexed Microprocessor Interface Read Cycle ....................................................................................................... 135
Figure-60 Parallel Intel Non-Multiplexed Microprocessor Interface Write Cycle ........................................................................................................ 136
Figure-61 Parallel Motorola Multiplexed Microprocessor Interface Read Cycle ........................................................................................................ 137
Figure-62 Parallel Motorola Multiplexed Microprocessor Interface Write Cycle ........................................................................................................ 138
Figure-63 Parallel Intel Multiplexed Microprocessor Interface Read Cycle ............................................................................................................... 139
Figure-64 Parallel Intel Multiplexed Microprocessor Interface Write Cycle ............................................................................................................... 140
Figure-65 JTAG Timing ............................................................................................................................................................................................. 141
List of Figures
9
January 11, 2007