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IDT74FCT543ALB PDF预览

IDT74FCT543ALB

更新时间: 2024-02-03 01:03:15
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
7页 75K
描述
FAST CMOS OCTAL LATCHED TRANSCEIVER

IDT74FCT543ALB 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Transferred零件包装代码:SOIC
包装说明:0.300 INCH, 0.050 INCH PITCH, SOIC-24针数:24
Reach Compliance Code:compliant风险等级:5.3
其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION系列:FCT
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:15.4 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):225
传播延迟(tpd):12.5 ns认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mm

IDT74FCT543ALB 数据手册

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IDT54/74FCT543  
IDT54/74FCT543A  
IDT54/74FCT543C  
FAST CMOS  
OCTAL LATCHED  
TRANSCEIVER  
Integrated Device Technology, Inc.  
FEATURES:  
DESCRIPTION:  
• IDT54/74FCT543 equivalent to FAST speed  
IDT54/74FCT543A 25% faster than FAST  
• IDT54/74FCT543C 40% faster than FAST  
• Equivalent to FAST output drive over full temperature  
and voltage supply extremes  
• IOL = 64mA (commercial), 48mA (military)  
• Separate controls for data flow in each direction  
• Back-to-back latches for storage  
• CMOS power levels (1mW typ. static)  
• Substantially lower input current levels than FAST  
(5µA max.)  
• TTL input and output level compatible  
• CMOS output level compatible  
The IDT54/74FCT543/A/C is a non-inverting octal trans-  
ceiver built using an advanced dual metal CMOS technology.  
These devices contain two sets of eight D-type latches with  
separate input and output controls for each set. For data flow  
fromAtoB, forexample, theA-to-BEnable(CEAB)inputmust  
be LOW in order to enter data from A0–A7 or to take data from  
B0–B7, as indicated in the Function Table. With CEAB LOW,  
a LOW signal on the A-to-B Latch Enable (LEAB) input makes  
the A-to-B latches transparent; a subsequent LOW-to-HIGH  
transition of the LEAB signal puts the A latches in the storage  
mode and their outputs no longer change with the A inputs.  
With CEAB and OEAB both LOW, the 3-state B output buffers  
are active and reflect the data present at the output of the A  
latches. Control of data from B to A is similar, but uses the  
CEBA, LEBA and OEBA inputs.  
• Product available in Radiation Tolerant and Radiation  
Enhanced versions  
• Military product compliant to MIL-STD-883, Class B  
FUNCTIONAL BLOCK DIAGRAMS  
DETAIL A  
B0  
D
Q
LE  
Q
D
A0  
LE  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
B1  
B2  
B3  
B4  
B5  
DETAIL A x 7  
B6  
B7  
OEBA  
OEAB  
CEAB  
CEBA  
LEBA  
LEAB  
2614 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
FAST is a registered trademark of National Semiconductor Co.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
MAY 1992  
1992 Integrated Device Technology, Inc.  
7.17  
DSC-4602/3  
1

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