IDT54FCT16601ET PDF预览

IDT54FCT16601ET

更新时间: 2025-09-17 23:11:39
品牌 Logo 应用领域
艾迪悌 - IDT 总线收发器输出元件
页数 文件大小 规格书
7页 120K
描述
FAST CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

IDT54FCT16601ET 数据手册

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IDT74FCT16601AT/CT/ET  
IDT74FCT162601AT/CT/ET  
PRODUCT PREVIEW  
FAST CMOS  
18-BIT UNIVERSAL BUS  
TRANSCEIVER  
Integrated Device Technology, Inc.  
WITH 3-STATE OUTPUTS  
bitregisteredtransceiversarebuiltusingadvanceddualmetal  
CMOS technology. These high-speed, low-power 18-bit reg-  
istered bus transceivers combine D-type latches and D-type  
flip-flops to allow data flow in either direction in a transparent,  
latched or clocked mode. Each direction has an independent  
latchenable,anindependentclockwithaclockenable,andan  
independent output enable. The package is organized with a  
flow-through signal pin organization to ease board layout. All  
inputs are designed with hysteresis for improved noise mar-  
gin.  
This transceiver is ideally suited for high speed memory  
interfaces which utilize high speed synchronous writes, by  
clocking the data into a high speed register. Reads can then  
be performed in a transparent or latched mode utilizing the  
same transceiver.  
The FCT16601AT/CT/ET are ideally suited for driving  
high-capacitance loads and low-impedance backplanes. The  
output buffers are designed with power off disable capability  
to allow "live insertion" of boards when used as backplane  
drivers.  
The FCT162601AT/CT/ET have balanced output drive  
with current limiting resistors. This offers low ground bounce,  
minimalundershoot,andcontrolledoutputfalltimes–reducing  
the need for external series terminating resistors. The  
FCT162601AT/CT/ET are plug-in replacements for the  
FCT16601AT/CT/ET and ABT16601 for on-board bus inter-  
face applications.  
FEATURES:  
• Common features:  
– 0.5 MICRON CMOS Technology  
– High-speed, low-power CMOS replacement for  
ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
– Low input and output leakage 1µA (max.)  
– ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
– Packages include 25 mil pitch SSOP, 19.6 mil pitch  
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack  
– Extended commercial range of -40°C to +85°C  
– VCC = 5V ±10%  
• Features for FCT16601AT/CT/ET:  
– High drive outputs (-32mA IOH, 64mA IOL)  
– Power off disable outputs permit “live insertion”  
– Typical VOLP (Output Ground Bounce) < 1.0V at  
VCC = 5V, TA = 25°C  
• Features for FCT162601AT/CT/ET:  
– Balanced Output Drivers: ±24mA  
– Reduced system switching noise  
– Typical VOLP (Output Ground Bounce) < 0.6V at  
VCC = 5V,TA = 25°C  
DESCRIPTION:  
The FCT16601AT/CT/ET and FCT162601AT/CT/ET 18-  
FUNCTIONAL BLOCK DIAGRAM  
1
OEAB  
56  
CLKENAB  
55  
CLKAB  
2
LEAB  
28  
LEBA  
30  
CLKBA  
29  
CLKENBA  
27  
PRODUCT PREVIEW  
OEBA  
CE  
1D  
C1  
3
54  
A1  
B1  
CLK  
CE  
1D  
C1  
CLK  
3247 drw 01  
TO 17 OTHER CHANNELS  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
COMMERCIAL TEMPERATURE RANGE  
AUGUST 1996  
1996 Integrated Device Technology, Inc.  
5.9  
DSC-3247/-  
1

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