Datasheet > ICS87972I

ICS87972I

更新时间： 2024-09-29 22:22:23

品牌	Logo	应用领域
矽成 - ICSI		时钟
页数	文件大小	规格书
14页	150K
描述
LOW SKEW, 1-TO-12 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

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ICS87972I 数据手册

ICS87972I

LOW SKEW, 1-TO-12

LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

Integrated

Circuit

Systems, Incꢀ

GENERAL DESCRIPTION

FEATURES

The ICS87972I is a LVCMOS clock generator

• Fully integrated PLL

,&6

and a member of the HiPerClockS™ family of High

Performance Clock Solutions from ICS. The

ICS87972I has three selectable inputs and pro-

vides 14 LVCMOS outputs.

• 14 LVCMOS outputs; (12) clocks, (1) feedback, (1) sync

HiPerClockS™

• Selectable crystal oscillator interface or LVCMOS reference

clock inputs

• CLK0, CLK1 can accept the following input levels:

LVCMOS or LVTTL

The ICS87972I is a highly flexible device. Using the crystal os-

cillator input, it can be used to generate clocks for a system. All

of these clocks can be the same frequency or the device can be

configured to generate up to three different frequencies among

the three output banks. Using one of the single ended inputs, the

ICS87972I can be used as a zero delay buffer/multiplier/divider

in clock distribution applications.

• Output frequency range: 8.33MHz to 125MHz

• VCO range: 200MHz to 480MHz

• Output skew: 550ps (maximum)

• Cycle-to-cycle jitter: ±100ps (typical)

• Full 3.3V supply voltage

The three output banks and feedback output each have their

own output dividers which allows the device to generate a

multitude of different bank frequency ratios and output-to-input

frequency ratios. In addition, 2 outputs in Bank C (QC2, QC3)

can be selected to be inverting or non-inverting. The output

frequency range is 8.33MHz - 125MHz. Input frequency range is

5MHz - 120MHz.

• -40°C to 85°C ambient operating temperature

• Pin compatible with MPC972

• Compatible with PowerPC™and Pentium™Microprocessors

The ICS87972I also has a QSYNC output which can be used

for system synchronization purposes. It monitors Bank A and

Bank C outputs and goes low one period of the faster clock prior

to coincident rising edges of Bank A and Bank C clocks. QSYNC

then goes high again when the coincident rising edges of Bank A

and Bank C occur. This feature is used primarily in applications

where Bank A and Bank C are running at different frequencies,

and is particularly useful when they are running at non-integer

multiples of one another.

PIN ASSIGNMENT

39 38 37 36 35 34 33 32 31 30 29 28 27

FSEL_B1

FSEL_B0

FSEL_A1

FSEL_A0

QA3

FSEL_FB1

QSYNC

GNDO

QC0

Example Applications:

1. System Clock generator: Use a 16.66 MHz Crystal to

generate eight 33.33MHz copies for PCI and four 100MHz

copies for the CPU or PCI-X.

V^DDO

QC1

QA2

FSEL_C0

FSEL_C1

QC2

ICS87972I

2. Line Card Multiplier: Multiply 19.44MHz from a back plane

to 77.76MHz for the line Card ASICs and Serdes.

GNDO

QA1

3. Zero Delay buffer for Synchronous memory: Fan out up

to twelve 100MHz copies from a memory controller ref-

erence clock to the memory chips on a memory module

with zero delay.

V^DDO

QA0

QC3

GNDO

VCO_SEL

GNDO

INV_CLK

9 10 11 12 13

52-Lead LQFP

10mm x 10mm x 1.4mm package body

Y package

Top View

87972DYI

www.icst.com/products/hiperclocks.html

REV. A OCTOBER 18, 2002

12 3 4 5 6 7...14

中文翻译

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与ICS87972I相关器件

型号	品牌	获取价格	描述	数据表
ICS87973BYILF	IDT	获取价格	PLL Based Clock Driver, 12 True Output(s), 0 Inverted Output(s), CMOS, PQFP52, 10 X 10 MM,
ICS87973CYI	IDT	获取价格	PLL Based Clock Driver, 12 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87973CYILF	IDT	获取价格	PLL Based Clock Driver, 12 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87973CYILFT	IDT	获取价格	PLL Based Clock Driver, 12 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87973CYIT	IDT	获取价格	PLL Based Clock Driver, 12 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87973DYI	IDT	获取价格	PLL Based Clock Driver, 13 True Output(s), 0 Inverted Output(s), CMOS, PQFP52, 10 X 10 MM,
ICS87973DYI-147	ICSI	获取价格	LOW SKEW, 1-TO-12 LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
ICS87973DYI-147LFT	IDT	获取价格	PLL Based Clock Driver, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87973DYI-147T	ICSI	获取价格	LOW SKEW, 1-TO-12 LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
ICS87973DYILF	IDT	获取价格	PLL Based Clock Driver, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40

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