Datasheet > ICS87974AY-01LF

ICS87974AY-01LF

更新时间： 2024-10-01 07:30:43

品牌	Logo	应用领域
艾迪悌 - IDT		驱动逻辑集成电路
页数	文件大小	规格书
14页	131K
描述
PLL Based Clock Driver, 15 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52

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ICS87974AY-01LF 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFP
包装说明：	LQFP,	针数：	52
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.15	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-PQFP-G52	JESD-609代码：	e3
长度：	10 mm	逻辑集成电路类型：	PLL BASED CLOCK DRIVER
功能数量：	1	反相输出次数：
端子数量：	52	实输出次数：	15
最高工作温度：	70 °C	最低工作温度：
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.35 ns
座面最大高度：	1.6 mm	最大供电电压 (Vsup)：	3.465 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	温度等级：	COMMERCIAL
端子面层：	MATTE TIN	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	10 mm
Base Number Matches：	1

ICS87974AY-01LF 数据手册

PRELIMINARY

ICS87974-01

Integrated

Circuit

Systems, Incꢀ

LOW SKEW, 1-TO-15,

DIFFERENTIAL-TO-LVCMOS CLOCK GENERATOR

GENERAL DESCRIPTION

FEATURES

• Fully integrated PLL

The ICS87974-01 is a low skew, low jitter 1-to-15

Differential-to-LVCMOS clock generator/zero

delay buffer and is a member of the HiPerClockS

family of High Performance Clock Solutions from

ICS. The device has a fully integrated PLLand three

HiPerClockS™

• 15 single ended 3.3V LVCMOS outputs

• Selectable LVCMOS_CLK or differential CLK0, nCLK0 inputs

for redundant clock applications

banks whose divider ratios can be independently controlled,

providing output frequency relationships of 1:1, 2:1, 3:1, 3:2,

3:2:1. In addition, the external feedback connection provides

for a wide selection of output-to-input frequency ratios. The

LVCMOS_CLK and CLK0, nCLK0 pins allow for redundant

clocking on the input and dynamically switching the PLL

between two clock sources.

• LVCMOS_CLK accepts LVCMOS or LVTTL input levels

• CLK0, nCLK0 pair can accept the following differential input

levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL

• Maximum output frequency up to 125MHz

• External feedback for ”zero delay” clock regeneration

• Cycle-to-cycle jitter: ±100ps (typical)

• Output skew: 350ps (maximum)

Guaranteed low jitter and output skew characteristics make the

ICS87974-01 ideal for those applications demanding well de-

fined performance and repeatability.

• Bank skew: ±50ps (typical)

• PLLreference zero delay: TBD

• 3.3V operating supply

• 0°C to 70°C ambient operating temperature

• Industrial temperature information available upon request

PIN ASSIGNMENT

52 51 50 49 48 47 46 45 44 43 42 41 40

GND

nMR

GND

QB1

CLK_EN

SELB

V^DDOB

QB2

SELC

GND

QB3

PLL_SEL

SELA

V^DDOB

QB4

ICS87974-01

CLK_SEL

LVCMOS_CLK

CLK0

FB_IN

GND

QFB

nCLK0

V^DD

V^DDOFB

VDDA

14 15 16 17 18 19 20 21 22 23 24 25 26

52-Lead LQFP

10mm x 10mm x 1.4mm package body

Y package

Top View

The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial

product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.

87974AY-01

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 13, 2002

12 3 4 5 6 7...14

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与ICS87974AY-01LF相关器件

型号	品牌	获取价格	描述	数据表
ICS87974AY-01LFT	IDT	获取价格	PLL Based Clock Driver, 15 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87974AY-01T	IDT	获取价格	PLL Based Clock Driver, 15 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87974AYI	IDT	获取价格	PLL Based Clock Driver, 14 True Output(s), 0 Inverted Output(s), CMOS, PQFP52, 10 X 10 MM,
ICS87974AYI-01	IDT	获取价格	PLL Based Clock Driver, 14 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87974AYI-01LF	IDT	获取价格	PLL Based Clock Driver, 14 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87974AYI-01LFT	IDT	获取价格	PLL Based Clock Driver, 14 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87974AYILF	IDT	获取价格	PLL Based Clock Driver, 14 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87974AYILFT	IDT	获取价格	PLL Based Clock Driver, 14 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87974AYIT	IDT	获取价格	PLL Based Clock Driver, 14 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40
ICS87974AYLF	IDT	获取价格	PLL Based Clock Driver, 15 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40

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