Datasheet > ICM7342MG

ICM7342MG

更新时间： 2024-01-21 09:07:31

品牌	Logo	应用领域
ICMIC		转换器光电二极管输出元件
页数	文件大小	规格书
9页	136K
描述
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

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技术参数
数据手册

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ICM7342MG 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Contact Manufacturer	零件包装代码：	MSOP
包装说明：	TSSOP,	针数：	10
Reach Compliance Code：	unknown	风险等级：	5.43
Is Samacsys：	N	最大模拟输出电压：	5.5 V
最小模拟输出电压：		转换器类型：	D/A CONVERTER
输入位码：	BINARY	输入格式：	SERIAL
JESD-30 代码：	S-PDSO-G10	长度：	3 mm
最大线性误差 (EL)：	0.293%	位数：	10
功能数量：	2	端子数量：	10
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	SQUARE	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	NOT SPECIFIED	认证状态：	Not Qualified
座面最大高度：	1.1176 mm	标称安定时间 (tstl)：	8 µs
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3 mm	Base Number Matches：	1

ICM7342MG 数据手册

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

a bank of 16 latches. The 4 bit control word (C3~C0) is

then decoded and the appropriate DAC is updated or

loaded depending on the control word (see Table 1).

DETAILED DESCRIPTION

The ICM7362 is a 12-bit dual voltage output DAC. The

ICM7342 is the 10-bit version of this family and the

ICM7322 is the 8-bit version.

Each DAC has a double-buffered input with an input latch

and a DAC latch. The DAC output will swing to its new

value when data is loaded into the DAC latch. For each

DAC, the user has three options: loading only the input

latch, updating the DAC with data previously loaded into

the input latch or loading the input latch and updating the

DAC at the same time with a new code. The user also has

the ability to perform this operation simultaneously for both

DACs as shown in Table 1.

This family of DACs employs a resistor string architecture

a 1.25V

guaranteeing monotonic behavior. There is

onboard reference and an operating supply range of 2.7V

to 5.5V.

Reference Input and Output

Each DAC has its own reference input pin which can be

driven from ground to V_DD-1.5V. The input resistance on

each of these pins is typically 41 k Ω. There is a gain of

two in the output amplifiers which means they swing from

ground at code 0 to 2 x V_{REF IN}at full-scale :

Power-On Reset

There is a power-on reset on board that will clear the

contents of all the latches to all 0s on power-up and the

DAC voltage outputs will go to ground.

Vout = 2 x (V_{REF IN}xD)/2ⁿ

Where D=digital input (decimal) and n= number of bits, i.e.

12 for ICM7362, 10 for ICM7342 and 8 for ICM7322.

There is also an onboard band-gap reference on all these

parts. This reference output is nominally 1.25V and is

brought out to a separate pin, REFOUT and can be used

to drive the reference input of the DACs. The outputs will

nominally swing from 0 to 2.5V when using this reference.

Output Amplifier

Each DAC has its own output amplifier with a wide output

voltage swing. The actual swing of the output amplifier will

be limited by offset error and gain error. See the

Applications Information Section for

discussion.

a more detailed

The amplifiers are configured in a gain of 2 with internal

gain resistors of about 50 kΩ. The output swing will be

from 0V to 2 x V_{REF IN}at full-scale.

The output amplifier can drive a load of 2.0 kΩ to V_DDor

GND in parallel with a 500 pF load capacitance.

The output amplifier has a full-scale typical settling time of

8 µs and it dissipates about 100 µA with a 3V supply

voltage.

Serial Interface and Input Logic

This dual DAC family uses a standard 3-wire connection

compatible with SPI/QSPI interfaces. Data is loaded in 16-

bit words which consist of 4 address and control bits

(MSBs) followed by 12 bits of data (see table 1). The

ICM7342 has the last two LSBs as don’t cares and the

ICM7322 has the last 4 LSBs as don’t cares. Each DAC is

double buffered with an input latch and a DAC latch.

All the digital inputs are CMOS/TTL compatible. The

current dissipation of the device however, will be higher

when the inputs are driven at TTL levels.

Data is clocked in on the rising edge of SCK which has a

Schmitt trigger internally to allow for noise immunity on the

SCK pin. This specially eases the use for opto-coupled

interfaces.

The CS pin must be low when data is being clocked into

the part. After the 16^thclock pulse the CS pin must be

pulled high (level-triggered) for the data to be transferred

to an input bank of latches. The CS pin also disables the

SCK pin internally when pulled high and the SCK pin must

be low before the CS pin is pulled back low. As the CS pin

is pulled high the shift register contents are transferred to

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

1...3 4 567 8 9

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与ICM7342MG相关器件

型号	品牌	描述	获取价格	数据表
ICM7343	ICMIC	QUAD 12/10/8-BIT VOLTAGE-OUTPUT DACS	获取价格
ICM7343Q	ICMIC	QUAD 12/10/8-BIT VOLTAGE-OUTPUT DACS	获取价格
ICM7343QG	ICMIC	QUAD 12/10/8-BIT VOLTAGE-OUTPUT DACS	获取价格
ICM7352	ICMIC	DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS with Serial Interface and Adjustable Output Offset	获取价格
ICM7352Q	ICMIC	DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS with Serial Interface and Adjustable Output Offset	获取价格
ICM7352QG	ICMIC	DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS with Serial Interface and Adjustable Output Offset	获取价格

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