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I4218E PDF预览

I4218E

更新时间: 2024-01-26 20:08:20
品牌 Logo 应用领域
华邦 - WINBOND 蜂窝移动电话便携式设备光电二极管商用集成电路
页数 文件大小 规格书
38页 398K
描述
Speech Synthesizer With RCDG, 180s, CMOS, PDSO28, 8 X 13.40 MM, PLASTIC, TSOP1-28

I4218E 技术参数

生命周期:Obsolete零件包装代码:TSOP
包装说明:TSOP1,针数:28
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.56应用:CELLULAR PHONE; PORTABLE APPLIANCES
商用集成电路类型:SPEECH SYNTHESIZER WITH RCDGJESD-30 代码:R-PDSO-G28
JESD-609代码:e4长度:11.8 mm
功能数量:1端子数量:28
片上内存类型:FLASH最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE认证状态:Not Qualified
最长读取时间:180 s座面最大高度:1.25 mm
最大供电电压 (Vsup):3.3 V最小供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.55 mm
端子位置:DUAL宽度:8 mm
Base Number Matches:1

I4218E 数据手册

 浏览型号I4218E的Datasheet PDF文件第4页浏览型号I4218E的Datasheet PDF文件第5页浏览型号I4218E的Datasheet PDF文件第6页浏览型号I4218E的Datasheet PDF文件第8页浏览型号I4218E的Datasheet PDF文件第9页浏览型号I4218E的Datasheet PDF文件第10页 
ISD4002 SERIES  
6. PIN DESCRIPTION  
PIN NAME  
PIN NO.  
FUNCTION  
SOIC /  
PDIP  
TSOP  
1
9
Slave Select: This input, when LOW, will select the  
SS  
ISD4002 device.  
MOSI  
2
10  
Master Out Slave IN: This is the serial input to the  
ISD4002 device when it is configured as slave. The master  
microcontroller places data on the MOSI line one half-cycle  
before the rising edge of SCLK for clocking into the device.  
MISO  
3
11  
Master In Slave Out: This is the serial output (open drain)  
of the ISD4002 device. This output goes into a high-  
impedance state if the device is not selected.  
VSSA / VSSD  
11, 12,  
23 / 4  
1, 17, 18 /  
12  
Ground: The ISD4002 series utilizes separate analog and  
digital ground busses. The analog ground (VSSA) pins  
should be tied together as close as possible and connected  
through a low-impedance path to power supply ground.  
The digital ground (VSSD) pin should be connected through  
a separate low-impedance path to power supply ground.  
These ground paths should be large enough to ensure that  
the impedance between the VSSA pins and the VSSD pin is  
less than 3 . The backside of the die is connected to VSS  
through the substrate. For chip-on-board design, the die  
attach area must be connected to VSS or left floating.  
NC  
5-10, 15,  
19-22  
3, 4, 13-  
16, 19, 21,  
23, 27, 28  
Not connected  
AUD OUT [1]  
13  
20  
Audio Output: This pin provides an audio output of the  
stored data and is recommended be AC coupled. It is  
capable of driving a 5 Kimpedance REXT  
.
[1]  
The AUD OUT pin is always at 1.2 volts when the device is powered up. When in playback, the output buffer  
connected to this pin can drive a load as small as 5 K. When in record, a resistor connects AUD OUT to the  
internal 1.2-volt analog ground supply. This resistor is approximately 850 K, but will vary somewhat according to  
the sample rate of the device. This relatively high impedance allows this pin to be connected to an audio bus  
without loading it down.  
Publication Release Date: October 26, 2005  
- 7 -  
Revision 1.3  

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