Datasheet > 存储 > SRAM> HY64UD16322M-DF85I

HY64UD16322M-DF85I

更新时间： 2024-09-25 03:02:27

品牌	Logo	应用领域
海力士 - HYNIX		存储静态存储器
页数	文件大小	规格书
11页	350K
描述
2M x 16 bit Low Low Power 1T/1C Pseudo SRAM

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技术参数
数据手册

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HY64UD16322M-DF85I 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	FBGA-48
针数：	48	Reach Compliance Code：	unknown
ECCN代码：	3A991.B.2.A	HTS代码：	8542.32.00.41
风险等级：	5.92	Is Samacsys：	N
Base Number Matches：	1

HY64UD16322M-DF85I 数据手册

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HY64UD16322M Series

Document Title

2M x 16 bit Low Low Power 1T/1C Pseudo SRAM

Revision history

Revision No. History

Draft Date Remark

1.0

1.1

Initial

Jan. 04. ’ 01

Jul. 03. ’ 01

Preliminary

Revised

- Change Pin Connection

- Improve tOE from 45ns to 30ns

- Correct State Diagram

1.2

1.3

Revised

Jul. 18. ’ 01

Oct. 06. ’ 01

Preliminary

- Correct Package Dimension

- Change Absolute Maximum Ratings

Revised

• DC Electrical Characteristics (ISB1,IDPD,ICC1)

• State Diagram

• Power Up Sequence

• Deep Power Down Sequence

• Read/Write Cycle Note

• Release standby current from 100mA to 120mA

Revised

1.4

1.5

Nov. 07. ’ 01

Dec. 20. ‘ 01

Preliminary

• DC Electrical Characteristics (ICC1: 3mA -> 5mA)

Revised

• Add 70ns Part

• Power Up Sequence

1.6

Revised

Feb. 27. ‘ 02

Preliminary

- Improve ICC2@70ns 30mA to 25mA

- Improve ICC2@85ns 30mA to 20mA

- Improve Ambient Temperature C/E to E/I

(0°C~85°C/-25°C~85°C ® -25°C~85°C/-40°C~85°C)

- Improve Maximum Absolute Ratings

(Vdd : -0.3V to 3.3V ® -0.3V to 3.6V)

- Improve tOE@85ns 30ns to 20ns

Revised

1.7

Mar. 11. ‘ 02

Final

- Pin Description

- Power Up & Deep Power Down Exit Sequence

This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not

assume any responsibility for use of circuits described. No patent licenses are implied.

Revision 1.7

March. 2002

12 3 4 5 6 7...11

中文翻译

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