HV6008PJ

更新时间： 2024-02-07 14:54:32

品牌	Logo	应用领域
超科 - SUPERTEX		显示驱动器显示器驱动程序和接口接口集成电路
页数	文件大小	规格书
5页	468K
描述
32-Channel 【40V Liquid Crystal Display Row Driver

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技术参数
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HV6008PJ 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIE	包装说明：	DIE,
针数：	48	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.89	Is Samacsys：	N
其他特性：	ADDITIONAL -10V TO -40V SUPPLY VOLTAGE FOR SYMMETRICAL SWINGS	数据输入模式：	SERIAL
显示模式：	DOT MATRIX	输入特性：	STANDARD
接口集成电路类型：	LIQUID CRYSTAL DISPLAY DRIVER	JESD-30 代码：	R-XUUC-N
JESD-609代码：	e0	复用显示功能：	NO
标称负供电电压：	-5 V	功能数量：	1
区段数：	32	端子数量：	48
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	TOTEM-POLE	输出极性：	CONFIGURABLE
封装主体材料：	UNSPECIFIED	封装代码：	DIE
封装形状：	RECTANGULAR	封装形式：	UNCASED CHIP
峰值回流温度（摄氏度）：	NOT SPECIFIED	认证状态：	Not Qualified
最大供电电压：	6 V	最小供电电压：	4 V
标称供电电压：	5 V	电源电压1-最大：	40 V
电源电压1-分钟：	10 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	TIN LEAD	端子形式：	NO LEAD
端子位置：	UPPER	处于峰值回流温度下的最长时间：	NOT SPECIFIED
最小 fmax：	1 MHz	Base Number Matches：	1

HV6008PJ 数据手册

HV6008

32-Channel ±40V Liquid Crystal Display Row Driver

Ordering Information

Package Options

44-J Lead Quad

Plastic Chip Carrier

44 -J Lead Quad

Ceramic Chip Carrier

44-Lead Quad Plastic

Gullwing

Die

Device

HV6008

HV6008PJ

HV6008DJ

HV6008PG

HV6008X

Features

❏ Symmetrical ± 40V output swing

General Description

Not recommended for new designs.

❏ Active return to GND

The HV60 is a 32-channel liquid crystal display driver with 3-state

DMOS outputs. Each output can be set to +40V, -40V, or GND.

A symmetric waveform can be applied to a capacitive load using

the phase shift feature of the HV60.

❏ 15mA peak source/sink/GND current per channel

❏ +5V control logic

❏ Special shift register with clear

❏ Phase shift control

TheHV60consistsofa32-bitshiftregisterwithClear,Enable,and

Phase Shift logic, and 32 high voltage output buffers. With the

Enable pin held low, all outputs are placed in the return to zero

(GND) state. When Enable is high, each output reflects the data

in its shift register bit. All outputs with a logic “0” in their shift

in their shift register will reflect the state of the phase shift pin.

TheseoutputswillbeswitchedtoV_PPwhenphaseshiftishighand

V_NNwhen phase shift is logic “0”.

❏ Output enable

❏ Data out enable

❏ 1MHz shift register

❏ Surface mount package available

Additional functions provided are Shift Register Clear and Data

Out.Allbitsoftheshiftregisterarechangedtologic“0”whenClear

is pulled low. With Clear at a logic “1”, normal shift register

operation proceeds. The data output reflects the status of the

32nd shift register stage.

Absolute Maximum Ratings

Supply voltage, V_DD1

-6V

+6V

Supply voltage, V_DD2

1,2

Supply voltage, V_PP

+42V

-42V

1,2

Supply voltage, V_NN

Logic input levels¹

V_DD1- 0.3V to V_DD2+ 0.3V

700mA

Ground currrent²

Continuous total power dissipation³

Operating temperature range

Storage temperature range

-40°C to +85°C

-65°C to +150°C

Notes:

1. All voltages are referenced to GND.

2. Duty cycle is limited by the total power dissipated in the package.

3. For operation above 25°C ambient derate linearly to 85°C at 16.7mW/°C.

02/96/022

Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability

indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to

workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the

Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.

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