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HT7024A PDF预览

HT7024A

更新时间: 2024-01-31 21:17:01
品牌 Logo 应用领域
台湾合泰/盛群 - HOLTEK 微控制器和处理器外围集成电路uCs集成电路uPs集成电路LTE
页数 文件大小 规格书
16页 161K
描述
Voltage Detector

HT7024A 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.84Is Samacsys:N
Base Number Matches:1

HT7024A 数据手册

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HT70XX  
HT7050A  
Symbol  
Ta=25°C  
Test Conditions  
Conditions  
Parameter  
Min.  
Typ.  
Max.  
Unit  
VDD  
¾
4.75  
5
5.25  
V
V
Hi®Lo Detectable Voltage  
Lo®Hi Detectable Voltage  
¾
¾
VDET  
4.845  
5.25  
5.775  
¾
0.02  
0.05  
0.1  
VHYS  
Hysteresis Width  
V
¾
¾
VDET  
VDET  
VDET  
IDD  
Operating Current  
Operating Voltage  
Output Sink Current  
8V  
¾
No load  
4
¾
6
7
¾
2.1  
3
mA  
V
VDD  
24  
¾
¾
IOL  
VOUT=0.36V  
3.6V  
mA  
DVDET  
Temperature Coefficient  
¾
0°C<Ta<70°C  
¾
±0.9  
¾
mV/°C  
DT  
a
HT7070A  
Symbol  
Ta=25°C  
Test Conditions  
Conditions  
Parameter  
Min.  
Typ.  
Max.  
Unit  
VDD  
¾
6.65  
7
7.35  
V
V
Hi®Lo Detectable Voltage  
Lo®Hi Detectable Voltage  
¾
¾
VDET  
6.783  
7.35  
8.085  
¾
0.02  
0.05  
0.1  
VHYS  
Hysteresis Width  
V
¾
¾
VDET  
VDET  
VDET  
IDD  
Operating Current  
Operating Voltage  
Output Sink Current  
8V  
¾
No load  
4
7
¾
2.1  
5
mA  
V
VDD  
24  
¾
¾
¾
10  
IOL  
VOUT=0.5V  
5V  
mA  
DVDET  
Temperature Coefficient  
¾
0°C<Ta<70°C  
¾
±0.9  
¾
mV/°C  
DT  
a
Functional Description  
The HT70XX series is a set of voltage detectors  
equipped with a high stability voltage reference which is  
connected to the negative input of a comparator¾ de-  
noted as VREF in the following figure for NMOS output  
voltage detector.  
If VDD falls below the minimum operating voltage, the  
output becomes undefined. When VDD goes from low to  
V
DD ´ RB / (RA+RB) > VREF, the comparator output and  
VOUT goes high.  
The detectable voltage is defined as:  
When the voltage drop to the positive input of the com-  
parator (i,e,VB) is higher than VREF, VOUT goes high,  
RA + RB + RC  
VDET (-) =  
´ VREF  
RB + RC  
M1 turns off, and VB is expressed as VBH=VDD  
´
The release voltage is defined as:  
(RB+RC) / (RA+RB+RC). If VDD is decreased so that VB  
falls to a value less than VREF, the comparator output in-  
verts from high to low, VOUT goes low, VC is high, M1  
turns on, RC is bypassed, and VB becomes:  
RA + RB  
VDET (+) =  
´ VREF  
RB  
V
BL=VDD´RB / (RA+RB), which is less than VBH. By so  
doing, the comparator output will stay low to prevent the  
circuit from oscillating when VB » VREF.  
Rev. 1.60  
6
January 14, 2003  

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