HT600/680/6207
Pin Assignment
D
A
T
A
t
r
i
g
g
e
r
t
y
p
e
T
E
t
r
i
g
g
e
r
t
y
p
e
9
-
A
d
d
r
e
s
s
8
-
A
d
d
r
e
s
s
1
0
-
A
d
d
r
e
s
s
5
-
A
d
d
r
e
s
s
/
D
a
t
a
4
-
A
d
d
r
e
s
s
/
D
a
4
t
-
a
D
a
t
a
A
A
A
A
D
D
D
D
1
1
1
1
1
2
3
4
1
2
3
4
2
1
1
1
0
9
8
7
V
A
A
A
D
9
8
7
D
A
1
1
1
1
1
2
3
4
1
2
3
4
2
1
1
1
0
9
8
7
V
A
A
A
D
9
8
7
D
A
A
A
A
D
D
D
D
1
1
1
1
1
2
3
4
5
6
7
8
9
1
2
4
5
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0
V
A
A
A
A
A
A
A
A
D
9
8
7
6
3
2
1
0
D
D
D
D
A
D
1
5
6
7
8
9
5
1
1
1
1
1
6
5
4
3
2
A
6
D
1
5
5
6
1
1
6
5
A
A
6
4
D
O
U
T
A
4
D
O
U
T
D
O
U
T
T
E
A
A
A
A
3
2
1
0
T
E
L
E
D
7
8
1
1
1
1
4
3
2
1
A
A
A
A
3
2
1
0
O
O
S
S
C
C
2
1
O
O
S
S
C
C
2
1
O
O
S
S
C
C
2
1
9
1
V
S
S
V
S
S
1
0
1
1
V
S
S
0
H
T
6
0
0
H
T
6
8
0
H
T
6
2
0
7
2
0
D
I
P
/
S
O
P
1
8
D
I
P
/
S
O
P
2
0
D
I
P
/
S
O
P
Pin Description
Internal
Connection
TRANSMISSION Input pins for address A0~A11 setting
GATE They can be externally set to VDD, VSS, or left open.
TRANSMISSION Input pins for address/data (AD10~AD17) setting
Pin Name I/O
Description
A0~A11
I
I
AD10~AD17
GATE
They can be externally set to VDD, VSS, or left open.
Input pins for data (D12~D15) setting and transmission
enable (active high)
They an be externally set to VDD or left open (see Note).
CMOS IN
Pull-low
D12~D15
I
DOUT
LED
O
O
CMOS OUT
NMOS OUT
Encoder data serial transmission output
LED transmission enable indicator
CMOS IN
Pull-low
TE
I
Transmission enable, active high (see Note).
OSC1
OSC2
VSS
I
OSCILLATOR
Oscillator input pin
O
OSCILLATOR
Oscillator output pin
Negative power supply, ground
Positive power supply
¾
¾
¾
¾
VDD
Note: D12~D15 are data input and transmission enable pins of the HT6207.
TE is the transmission enable pin of the HT600/HT680.
3
April 24, 2000