HT66F0182
A/D Flash MCU
ꢀ
SubtractꢀDataꢀMemoryꢀfromꢀACCꢀwithꢀresultꢀinꢀDataꢀMemory
SUBM A,[m]
Descriptionꢀ
ꢀ
ꢀ
TheꢀspecifiedꢀDataꢀMemoryꢀisꢀsubtractedꢀfromꢀtheꢀcontentsꢀofꢀtheꢀAccumulator.ꢀTheꢀresultꢀisꢀꢀ
storedꢀinꢀtheꢀDataꢀMemory.ꢀNoteꢀthatꢀifꢀtheꢀresultꢀofꢀsubtractionꢀisꢀnegative,ꢀtheꢀCꢀflagꢀwillꢀbeꢀꢀ
clearedꢀtoꢀ0,ꢀotherwiseꢀifꢀtheꢀresultꢀisꢀpositiveꢀorꢀzero,ꢀtheꢀCꢀflagꢀwillꢀbeꢀsetꢀtoꢀ1.
Operationꢀ
[m]ꢀ←ꢀACCꢀ−ꢀ[m]
OV,ꢀZ,ꢀAC,ꢀC
Affectedꢀflag(s)ꢀ
SubtractꢀimmediateꢀdataꢀfromꢀACC
SUB A,x
Descriptionꢀ
ꢀ
ꢀ
TheꢀimmediateꢀdataꢀspecifiedꢀbyꢀtheꢀcodeꢀisꢀsubtractedꢀfromꢀtheꢀcontentsꢀofꢀtheꢀAccumulator.ꢀꢀ
TheꢀresultꢀisꢀstoredꢀinꢀtheꢀAccumulator.ꢀNoteꢀthatꢀifꢀtheꢀresultꢀofꢀsubtractionꢀisꢀnegative,ꢀtheꢀCꢀꢀ
flagꢀwillꢀbeꢀclearedꢀtoꢀ0,ꢀotherwiseꢀifꢀtheꢀresultꢀisꢀpositiveꢀorꢀzero,ꢀtheꢀCꢀflagꢀwillꢀbeꢀsetꢀtoꢀ1.
Operationꢀ
ACCꢀ←ꢀACCꢀ−ꢀx
OV,ꢀZ,ꢀAC,ꢀC
Affectedꢀflag(s)ꢀ
SwapꢀnibblesꢀofꢀDataꢀMemory
SWAP [m]
Descriptionꢀ
Operationꢀ
Theꢀlow-orderꢀandꢀhigh-orderꢀnibblesꢀofꢀtheꢀspecifiedꢀDataꢀMemoryꢀareꢀinterchanged.
[m].3~[m].0ꢀ↔ꢀ[m].7~[m].4
None
Affectedꢀflag(s)ꢀ
ꢀ
SwapꢀnibblesꢀofꢀDataꢀMemoryꢀwithꢀresultꢀinꢀACC
SWAPA [m]
Descriptionꢀ
ꢀ
Theꢀlow-orderꢀandꢀhigh-orderꢀnibblesꢀofꢀtheꢀspecifiedꢀDataꢀMemoryꢀareꢀinterchanged.ꢀTheꢀꢀ
resultꢀisꢀstoredꢀinꢀtheꢀAccumulator.ꢀTheꢀcontentsꢀofꢀtheꢀDataꢀMemoryꢀremainꢀunchanged.
Operationꢀ
ꢀ
ACC.3~ACC.0ꢀ←ꢀ[m].7~[m].4ꢀ
ACC.7~ACC.4ꢀ←ꢀ[m].3~[m].0
Affectedꢀflag(s)ꢀ
None
SkipꢀifꢀDataꢀMemoryꢀisꢀ0
SZ [m]
Descriptionꢀ
ꢀ
ꢀ
IfꢀtheꢀcontentsꢀofꢀtheꢀspecifiedꢀDataꢀMemoryꢀisꢀ0,ꢀtheꢀfollowingꢀinstructionꢀisꢀskipped.ꢀAsꢀthisꢀꢀ
requiresꢀtheꢀinsertionꢀofꢀaꢀdummyꢀinstructionꢀwhileꢀtheꢀnextꢀinstructionꢀisꢀfetched,ꢀitꢀisꢀaꢀtwoꢀꢀ
cycleꢀinstruction.ꢀIfꢀtheꢀresultꢀisꢀnotꢀ0ꢀtheꢀprogramꢀproceedsꢀwithꢀtheꢀfollowingꢀinstruction.
Operationꢀ
Skipꢀifꢀ[m]=0
None
Affectedꢀflag(s)ꢀ
SkipꢀifꢀDataꢀMemoryꢀisꢀ0ꢀwithꢀdataꢀmovementꢀtoꢀACC
SZA [m]
Descriptionꢀ
TheꢀcontentsꢀofꢀtheꢀspecifiedꢀDataꢀMemoryꢀareꢀcopiedꢀtoꢀtheꢀAccumulator.ꢀIfꢀtheꢀvalueꢀisꢀzero,ꢀꢀ
theꢀfollowingꢀinstructionꢀisꢀskipped.ꢀAsꢀthisꢀrequiresꢀtheꢀinsertionꢀofꢀaꢀdummyꢀinstructionꢀꢀ
whileꢀtheꢀnextꢀinstructionꢀisꢀfetched,ꢀitꢀisꢀaꢀtwoꢀcycleꢀinstruction.ꢀIfꢀtheꢀresultꢀisꢀnotꢀ0ꢀtheꢀꢀ
programꢀproceedsꢀwithꢀtheꢀfollowingꢀinstruction.
ꢀ
ꢀ
ꢀ
Operationꢀ
ꢀ
ACCꢀ←ꢀ[m]ꢀ
Skipꢀifꢀ[m]=0
Affectedꢀflag(s)ꢀ
None
SkipꢀifꢀbitꢀiꢀofꢀDataꢀMemoryꢀisꢀ0
SZ [m].i
Descriptionꢀ
ꢀ
ꢀ
IfꢀbitꢀiꢀofꢀtheꢀspecifiedꢀDataꢀMemoryꢀisꢀ0,ꢀtheꢀfollowingꢀinstructionꢀisꢀskipped.ꢀAsꢀthisꢀrequiresꢀ
theꢀinsertionꢀofꢀaꢀdummyꢀinstructionꢀwhileꢀtheꢀnextꢀinstructionꢀisꢀfetched,ꢀitꢀisꢀaꢀtwoꢀcycleꢀ
instruction.ꢀIfꢀtheꢀresultꢀisꢀnotꢀ0,ꢀtheꢀprogramꢀproceedsꢀwithꢀtheꢀfollowingꢀinstruction.
Operationꢀ
Skipꢀifꢀ[m].i=0
None
Affectedꢀflag(s)ꢀ
Rev. 1.10
111
�ꢀꢁꢀst ꢂꢃꢄ ꢂ01ꢅ
5秒后页面跳转
STM32H743技术深度剖析与应用案例探索
LM321中文资料解析：引脚功能介绍、技术特点、技术特性分析
74HC14芯片资料介绍：性能特性分析、引脚介绍
LM1875芯片手册：功放参数分析、引脚说明、电路设计要点
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
