HT45R15B
1.5 Pin Description
Configuration
Options
Software
Options
Pad Name
I/O
Description
Bidirectional 2-bit input/output port. PA0, PA1 is
pin-shared with OPAN/OSC2, OPAO/OSC1/AN8
respectively.
When configured as bidirectional input/output port. It
can be configured as wake-up input by configuration
options. Software instructions determine the CMOS
output or Schmitt trigger input with or without
Wake-up
Pull-high
OSCCFG
OPAEN
PA1 or AN8
PA0/OPAN/OSC2
PA1/OPAO/OSC1/AN8
OSC1+OSC2 or
OSC1+PA0 or
OSC1+OPAN or
I/O
pull-high resistor (determined
configuration option: bit option).
by pull-high
Configuration options determine the I/O, OSC1,
OSC2 or operational amplifier functions to be used.
Once selected as operational amplifier input/output,
oscillator input/output or A/D input, the I/O function
and pull-high resistor are disabled automatically.
Bidirectional 3-bit input/output port. PA2, PA3, PA4
is pin-shared with CP0N/INTB, CP0P/TMR0, PPG
respectively.
PA1/AN8+PA0 or
PA1/AN8+OPAN or
OPAO(AN8)+OPAN
Wake-up
Pull-high
When configured as bidirectional input/output port. It
can be configured as wake-up input by configuration
options. Software instructions determine the CMOS
output or Schmitt trigger input with or without
CMP0EN,
CMP1EN, PPGEN,
PLEV, PTSYN
C1CTL
pull-high resistor (determined
configuration option: bit option).
by pull-high
Once comparator 0 function is configured, the I/O
function and pull-high resistor are disabled
automatically.
PA2/CP0N/INTB
PA3/CP0P/TMR0
PA4/PPG
I/O
Note if comparator
1 is enabled and C1CTL
PA2/INTB+PA3/TMR0 or
CP0N+CP0P or
CP0N+CP0P/CP1N or
PA2/INTB +CP1N
software option selected PA3 as CP1N, the PA3 I/O
function and pull-high resistor are disabled
automatically.
Once the PPG function is used, the internal
registers related to PA4 can not be used. PPG pin is
floating during PPG inactive period, power-on reset,
RESB pin reset, LVR reset and oscillator stop
condition (if enabled). The PPG output level (active
low or active high) can be selected via configuration
option.
PA4 or PPG
Wake-up
Pull-high
Bidirectional 1-bit input/output port. PA5 is
pin-shared with CP1N/AN7.
When configured as bidirectional input/output port. It
can be configured as wake-up input by configuration
options. Software instructions determine the CMOS
output or Schmitt trigger input with or without
PA5 or AN7
C1CTL
CMP1EN
PA5/CP1N/AN7
I/O
pull-high resistor (determined
by pull-high
configuration option: bit option). Once selected as
an A/D input or comparator 1 input the I/O function
and pull-high resistor are disabled automatically.
Bidirectional 2-bit input/output port. PA6, PA7 is
PA5/AN7 or CP1N(AN7)
Wake-up
Pull-high
pin-shared
with
CP2N/AN6,
CP2P/AN5
respectively.
CMP2CFG
PAx or ANx
When configured as bidirectional input/output port.
Each bit can be configured as wake-up input by
PA6/CP2N/AN6
PA7/CP2P/AN5
configuration
options.
Software
instructions
I/O
I/O
PA6/AN6+PA7/AN5 or
determine the CMOS output or Schmitt trigger input
with or without pull-high resistor (determined by
pull-high configuration option: bit option). Once
selected as an A/D input or comparator 2 input, the
I/O function and pull-high resistor are disabled
automatically.
PA6/AN6+CP2P(AN5) or
CP2N(AN6)+ PA7/AN5 or
CP2N(AN6)+CP2P(AN5)
PB0/SCL/ RESB
Bidirectional 2-bit input/output port. PB0, PB1 is
Pull-high (PB1)
Page 5 of 66
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The information contained herein is the exclusive property of HOLTEK and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of HOLTEK.
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