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HS7541AJN PDF预览

HS7541AJN

更新时间: 2024-02-21 12:58:08
品牌 Logo 应用领域
西伯斯 - SIPEX 转换器数模转换器光电二极管
页数 文件大小 规格书
7页 113K
描述
12-Bit CMOS Multiplying DAC

HS7541AJN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP18,.3Reach Compliance Code:unknown
风险等级:5.92转换器类型:D/A CONVERTER
输入位码:BINARY, OFFSET BINARYJESD-30 代码:R-XDIP-T18
JESD-609代码:e0最大线性误差 (EL):0.01%
位数:12功能数量:1
端子数量:18最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC
封装代码:DIP封装等效代码:DIP18,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:15 V认证状态:Not Qualified
子类别:Other Converters标称供电电压:15 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

HS7541AJN 数据手册

 浏览型号HS7541AJN的Datasheet PDF文件第1页浏览型号HS7541AJN的Datasheet PDF文件第2页浏览型号HS7541AJN的Datasheet PDF文件第3页浏览型号HS7541AJN的Datasheet PDF文件第4页浏览型号HS7541AJN的Datasheet PDF文件第5页浏览型号HS7541AJN的Datasheet PDF文件第7页 
GAIN TRIM  
+15V  
16  
V
(–10V)  
REF  
2K  
17  
4
D
(MSB)  
V
V
18  
1
11  
REF  
DD  
R
FB  
1KΩ  
I
O1  
+
V
INPUT  
DATA  
OUT  
HS7541A  
10KΩ  
390Ω  
15  
2
I
10KΩ  
D
(LSB)  
O2  
0
GND  
3
+
10KΩ  
500Ω  
Figure 5. Bipolar Operation  
As shown in the figure, the output current of the  
HS7541A is typically connected to an external  
op amp, with its non-inverting input tied to  
ground. The amplifier should be selected for  
low input bias current and low drift over tem-  
perature. Tomaintainthespecifiedlinearity, the  
amplifier’sinputoffsetvoltageshouldbemulled  
to less than ±200µV (0.1 LSB).  
minal, may be anywhere between 10k(the  
feedback resistor alone when all digital inputs  
are LOW) and 7.5k(the feedback resistor in  
parallel with approximately 30kof the R-2R  
ladder network resistance when any single bit is  
HIGH). Static accuracy and dynamic perfor-  
mance will be affected by these variations.  
UNIPOLAR OPERATION  
BIPOLAR OPERATION  
Figure 4 shows the connections to implement  
digital unipolar operation of the HS7541A. The  
reference voltage applied to VREF (pin17) may be  
positive or negative. The 2Kpotentiometer  
tied to VREF, and the 1Kresistor in the feed-  
back loop are both optional; they are needed  
only when gain error must be trimmed to less  
than 0.3% FSR. They should track each other to  
better than 0.1%. It is not necessary that they  
track the resistors internal to the HS7541A.  
Figure 5 shows the connections for bipolar  
operation of the HS7541A. The digital input  
coding is offset binary as shown in Table 2. As  
is the case for unipolar operation, the gain trim  
resistors can be omitted if minimum gain error  
is not required. The op amp selection criteria  
and offset nulling are the same as for unipolar  
operation.  
DIGITAL INPUT  
1111 1111 1111  
1000 0000 0001  
1000 0000 0000  
0100 0000 0000  
0000 0000 0000  
I0UT  
DIGITAL INPUT  
1111 1111 1111  
1000 0000 0000  
0111 1111 1111  
0000 0000 0000  
I0UT  
-0.99951 x VREF  
-0.00049 x VREF  
0V  
-0.99975 x VREF  
-0.50000 x VREF  
-0.49975 x VREF  
0V  
+0.50000 x VREF  
+1.00000 x VREF  
Table 1. Unipolar Input Coding  
Table 2. Bipolar Input Coding  
HS7541A  
12-Bit CMOS Multiplying DAC  
© Copyright 2000 Sipex Corporation  
6

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