- 1
- 2
2
(MSB)
2
Output
400Ω
470Ω
V
V
REF
DD
0
0
1
1
0
0
200Ω
1
0
1
1/4 Full-Scale
1/2 Full-Scale
3/4 Full-Scale
R
I
FEEDBACK
R
OS
-
O1
DIGITAL
INPUTS
A
+
I
O2
SP7514
HS3140
V
Table 1. Contribution of the two MSB's
OUT
accuracy required of any switch for a given overall
converter accuracy.
GND
With the decoded converter described above, a 1%
change in any of the converter’s switches will affect
the output by no more than 0.25% of full-scale as
compared to 0.5% for a conventional converter. In
other words the conventional D/A converter can be
made less sensitive to the quality of its individual bits
by decoding.
Figure 2. Unipolar Operation
settlingtime,andbandwidth.TheDACoutputequiva-
lent circuit can be represented as shown in Figure 1.
Digitalfeedthroughisthechangeinanalogoutputdue
to the toggling conditions on the converter input data
lines when the analog input VREF is at 0V. The
SP7514/HS3140verylowCOandthereforewillyield
low digital feedthrough. Inputs to the DAC can be
buffered.Thisinputlatchwithmicroprocessorcontrol
is shown in Figure 4.
In the SP7514/HS3140 the first four MSB’s are
decodedinto16levelswhichdrive15equallyweighted
current sources. The sensitivity of each switch on the
output is reduced by a factor of 8. Each of the 15
sources contributes 6.25% output change rather than
an MSB change of 50% for the common approach.
SettlingtimeisdirectlyaffectedbyCO.InFigure1,CO
combines with Rf to add a pole to the open loop
response, reducing bandwidth and causing excessive
phase shift - which could result in ringing and/or
oscillation.Afeedbackcapacitor,Cf mustbeaddedto
restorestability.EvenwithCf,thereisstillazero-pole
mismatchduetoRiCO whichiscodedependent. This
codedependentmismatchisminimizedwhenCORi =
RfCf. However Cf must now be made larger to
compensate for worst case ∆RiCO - resulting in re-
ducedbandwidthandincreasedsettlingtime.Withthe
SP7514/HS3140, small values for Cf must be used.
FollowingthedecodedsectionoftheDACastandard
binary weighted R-2R approach is used. This divides
each of the 16 levels (or 6.25% of F.S.) into 4096
discrete levels (the 12 LSB’s).
Output Capacitance
The SP7514/HS3140 have very low output capaci-
tance(CO).ThisisspecifiedbothwithallswitchesON
andallswitchesOFF.Outputcapacitancevariesfrom
50pF to 100pF over all input codes. This low capaci-
tance is due in part to the decoding technique used.
Smaller switches are used with resulting less capaci-
tance. Three important system characteristics are
affected by CO and∆CO; namely digital feedthrough,
400Ω
470Ω
V
V
REF
DD
200Ω
R
FEEDBACK
R
OS1
-
I
I
O1
A
1
DIGITAL
INPUTS
SP7514
HS3140
TRANSFER FUNCTION (N=14)
+
V
OUT
4KΩ
BINARY INPUT UNIPOLAR OUTPUT BIPOLAR OUTPUT
4KΩ
111...111
100...001
100...000
011...111
000…001
000...000
–VREF (1 - 2–N
)
–VREF (1 – 2 –(N – 1)
–VREF (2 –(N – 1)
0
VREF (2 –(N – 1)
VREF (1 – 2 –(N – 1)
)
O2
–VREF (1/2 + 2–N
)
)
)
R
R
OS2
GND
–VREF /2
–VREF (1/2 – 2–N
R
OS2
)
-
A
2
+
–VREF (2(N – 1)
)
)
V
OUT1
, A
, OP-07
2
A
1
0
VREF
Table 2. Transfer Function
Figure 3. Bipolar Operation
HS3140/SP7514
HS3140/SP7514 14-Bit Multiplying DACs
© Copyright 2000 Sipex Corporation
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