Datasheet > HK32ALG31K8U6

HK32ALG31K8U6

更新时间： 2023-12-06 20:00:01

品牌	Logo	应用领域
航顺 - HK		/
页数	文件大小	规格书
39页	1327K
描述
QFN32

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数据手册

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HK32ALG31K8U6 数据手册

Product overview

Encryption for instructions and data stored in the Flash, preventing the damage caused by physical

attacks

◦

4-Kbyte SRAM

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Clock

◦

High-speed external clock (HSE): 4 MHz to 32 MHz

High-speed internal clock (HSI): 56 MHz (HSI56)/14 MHz (HSI14)/8 MHz (HSI)

GPIO external input clock: 56 MHz (maximum value)

Reset

◦

External reset on NRST pin

Window watchdog reset (WWDG reset)

Software reset (SW Reset)

Power reset (POR/PDR)

Low-power management reset

Option byte loading reset (OBL reset)

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GPIO

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Up to 28 GPIOs

Data communication interface

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1 × USART

RX/TX pins switchable by using software

Wakes up the MCU from Stop mode when receiving data

1 × I2C

Transmission rate at 1 Mbit/s, 400 Kbit/s, 100 Kbit/s

Wakes up the MCU from Stop mode when receiving data

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Timer

1 × 16-bit advanced timer: TIM1

◦

With the break function and four PWM outputs, three of which have complementary PWM

outputs with programmable inserted dead-times

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Four configurable logic units (CLUs)

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Each CLU has pins directly connected with the internal logic that can trigger multiple on-chip resources.

Supports different combinations of logical functions.

On-chip analog circuitry

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1 × 12-bit SAR ADC (up to 10 analog input channels)

Maximum frequency: 1 MSPS (12-bit)

Supports the differential pair input

Supports automatic continuous conversion and scan conversion

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Internal reference voltage

Temperature sensor

The analog output is connected to an independent ADC channel.

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2 × 12-bit DACs

1...4 5 678 9 10...39

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