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HIP0045ABT

更新时间： 2024-09-27 14:50:55
品牌 Logo 应用领域
瑞萨 - RENESAS 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
10页 93K
描述
1.75A 8 CHANNEL, LATCH BASED PRPHL DRVR, PDSO20

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中文翻译

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HIP0045ABT 技术参数

是否Rohs认证： 不符合生命周期：Transferred
零件包装代码：SOIC包装说明：POWER, HEAT SINK, PLASTIC, SOP-20
针数：20Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.38内置保护：OVER CURRENT; ZENER CLAMP; OVER VOLTAGE
驱动器位数：8接口集成电路类型：LATCH BASED PERIPHERAL DRIVER
JESD-30 代码：R-PDSO-G20JESD-609代码：e0
功能数量：8端子数量：20
最高工作温度：125 °C最低工作温度：-40 °C
输出电流流向：SINK最大输出电流：1 A
标称输出峰值电流：1.75 A封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP20,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
电源：5 V认证状态：Not Qualified
子类别：Peripheral Drivers最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：BIMOS
温度等级：AUTOMOTIVE端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL断开时间：10 µs
接通时间：10 µsBase Number Matches：1

HIP0045ABT 数据手册

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HIP0045  
Data Sheet  
April 1999  
File Number 4047.2  
1A/50V Octal Low Side Power Driver With  
Serial Bus Control and Fault Protection  
Features  
• Octal NDMOS Output Drivers in a High Voltage Power  
BiMOS Process  
The HIP0045 is a logic controlled, eight channel Octal Serial  
Power Low Side Driver. The serial peripheral interface (SPI)  
utilized by the HIP0045 is a serial synchronous bus compatible  
with Intersil CDP68HC05, or equivalent, microcomputers. As  
shown in the Block Diagram for the HIP0045, each of the open  
drain MOS Output Drivers have individual protection for over-  
voltage and over-current. Each output channel has separate  
output latch control with fault unlatch and diagnostic or status  
feedback. Under normal ON conditions, each output driver is in  
a low voltage, high current state of saturated turn-on.  
• Over-Stress Protection - Each Output:  
- Over-Current Protection . . . . . . . . . . . . . . . . . . . 1A Min  
- Over-Voltage Clamp Protection . . . . . . . . . . . . 50V Typ  
- Thermal Shutdown Protection (2 Channels)  
• Open-Load Detection  
• Power BiMOS Output Configuration  
- Current Latch-Off Protection for 6 Channels; 2 with  
External Drive Input and ORed with SPI Bus Control  
Comparators in the diagnostic circuitry monitor the output  
drivers to determine if an out of saturation condition exists. If a  
fault is sensed, the respective output driver for Channels 0 - 5  
have overcurrent latch-off. Channels 6 and 7 are configured for  
lamp drivers and have current limiting with over-temperature  
latch-off. Channels 0 and 1 have direct parallel drive control for  
PWM applications and are ORed with the SPI Bus control. All  
channels are SPI Bus controlled and sense the output states  
for diagnostic feedback.  
- 2 Channels Configured for Lamp Drivers with Current  
Limiting and Over-Temperature Latch-Off  
• High Speed CMOS Logic Control  
- SPI Bus Controlled Interface  
- Individual Output Latch  
- Individual Fault Unlatch and Feedback  
- Common Reset Line  
• Low Quiescent Current . . . . . . . . . . . . . . . . . . . 5mA Max  
The HIP0045 is fabricated in a Power BiMOS IC process,  
and is intended for use in automotive and other applications  
having a wide range of temperature and electrical stress  
conditions. It is particularly suited for driving relays,  
solenoids and lamps in applications where low standby  
power, high operating voltage, and high output current in  
high ambient temperature conditions is required.  
o
o
• Ambient Operating Temp. Range . . . . . . . -40 C to 125 C  
Applications  
• Automotive and Industrial Systems  
• Solenoids, Relays and Lamp Drivers  
• Logic and µP Controlled Drivers  
• Robotic Controls  
The HIP0045 is in a 20 lead plastic Power SOP (PSOP)  
Package with an integral copper ‘slug’ to conduct heat directly  
to a PCB interface or heat sink on the bottom of the package.  
Pinout  
Ordering Information  
PART NO. TEMP. RANGE ( C)  
HIP0045 (PSOP WITH HEAT SLUG)  
TOP VIEW  
o
PACKAGE  
PKG. NO.  
INTEGRAL COPPER  
HEAT SINK ‘SLUG’  
FOR PCB CONTACT  
OR EXT. HEAT SINK  
HIP0045AB  
-40 to 125  
20 Ld PSOP  
M20.433  
Driver Block Diagram  
GND  
CE  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
GND  
IN0  
OUT  
RESET  
OUT7  
OUT5  
OUT3  
OUT1  
MISO  
OUT0  
OUT2  
OUT4  
OUT6  
MOSI  
SCK  
I
SK  
DRIVER  
OC LIMIT  
(CH. 6, 7)  
V
CC  
SPI AND  
DIRECT  
INPUT  
CONTROL  
WITH  
FAULT/  
STATUS  
OUTPUT  
IN1  
GND  
OC LATCH  
(CH. 0-5)  
-
V
CC  
+
GND  
OC  
REF  
OVER-TEMP.  
DET. (CH. 6, 7)  
+
-
V
REF  
FAULT/STATUS  
RESET  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
4-1  
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中文翻译

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