HI-1579, HI-1581
PIN DESCRIPTIONS
PIN
(DIP & SOIC)
SYMBOL FUNCTION
DESCRIPTION
1
2
VDDA
BUSA
BUSA
RXENA
GNDA
VDDB
BUSB
BUSB
RXENB
GNDB
RXB
power supply
analog output
analog output
digital input
power supply
power supply
analog output
analog output
digital input
power supply
digital output
digital output
digital input
digital input
digital input
digital output
digital output
digital input
digital input
digital input
+3.3 volt power for transceiver A
MIL-STD-1533 bus driver A, positive signal
MIL-STD-1553 bus driver A, negative signal
Receiver A enable. If low, forces RXA and RXA low
Ground for transceiver A
3
4
5
6
+3.3 volt power for transceiver B
7
MIL-STD-1533 bus driver B, positive signal
MIL-STD-1553 bus driver B, negative signal
Receiver B enable. If low, forces RXB and RXB low
Ground for transceiver B
8
9
10
11
12
13
14
15
16
17
18
19
20
Receiver B output, inverted
RXB
Receiver B output, non-inverted
TXINHB
TXB
Transmit inhibit, bus B. If high BUSB, BUSB disabled
Transmitter B digital data input, non-inverted
Transmitter B digital data input, inverted
Receiver A output, inverted
TXB
RXA
RXA
Receiver A output, non-inverted
TXINHA
TXA
Transmit inhibit, bus A. If high BUSA, BUSA disabled
Transmitter A digital data input, non-inverted
Transmitter A digital data input, inverted
TXA
FUNCTIONAL DESCRIPTION
RECEIVER
The HI-1579 family of dual data bus transceivers contains
differential voltage source drivers and differential receiv-
ers. It is intended for applications using a MIL-STD-1553
A/B data bus. The device produces a trapezoidal output
waveform during transmission.
The receiver accepts bi-phase differential data from the
MIL-STD-1553 bus through the same direct or transformer
coupled interface as the transmitter. The receiver’s differ-
ential input stage drives a filter and threshold comparator
that produces CMOS data at the RXA/B and RXA/B output
pins. When the MIL-STD-1553 bus is idle and RXENA or
RXENB are high, RXA/B will be logic “0” on HI-1579 and
logic “1” on HI-1581.
TRANSMITTER
Data input to the device’s transmitter section is from the
complementary CMOS inputs TXA/B and TXA/B. The
transmitter accepts Manchester II bi-phase data and con-
verts it to differential voltages on BUSA/B and BUSA/B.
The transceiver outputs are either direct or transformer
coupled to the MIL-STD-1553 data bus. Both coupling
methods produce a nominal voltage on the bus of 7.5 volts
peak to peak.
Each set of receiver outputs can also be independently
forced to the bus idle state (logic "0” on HI-1579 or logic “1”
on HI-1581) by setting RXENAor RXENB low.
MIL-STD-1553 BUS INTERFACE
A direct coupled interface (see Figure 2) uses a 1:2.5 ratio
isolation transformer and two 55 ohm isolation resistors
between the transformer and the bus.
The transmitter is automatically inhibited and placed in the
high impedance state when both TXA/B and TXA/B are ei-
ther at a logic “1” or logic “0” simultaneously. A logic “1” ap-
plied to the TXINHA/B input will force the transmitter to the
high impedance state, regardless of the state of TXA/B and
TXA/B.
In a transformer coupled interface (see Figure 3), the
transceiver is also connected to a 1:2.5 isolation
transformer which in turn is connected to a 1:1.4 coupling
transformer. The transformer coupled method also
requires two coupling resistors equal to 75% of the bus
characteristic impedance (Zo) between the coupling
transformer and the bus.
HOLT INTEGRATED CIRCUITS
2