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HI-15530CLT PDF预览

HI-15530CLT

更新时间： 2024-02-27 09:54:58
品牌 Logo 应用领域
HOLTIC 解码器编码器
页数 文件大小 规格书
11页 314K
描述
Manchester Encoder / Decoder

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HI-15530CLT 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SSOP
包装说明：SSOP, SSOP24,.3针数：24
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.31
Is Samacsys：NJESD-30 代码：R-PDSO-G24
JESD-609代码：e3长度：8.2 mm
湿度敏感等级：1功能数量：1
端子数量：24最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP24,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：3.3/5 V
认证状态：Not Qualified座面最大高度：2 mm
子类别：Network Interfaces标称供电电压：3.3 V
表面贴装：YES技术：CMOS
电信集成电路类型：MANCHESTER ENCODER/DECODER温度等级：MILITARY
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：5.3 mm
Base Number Matches：1

HI-15530CLT 数据手册

 浏览型号HI-15530CLT的Datasheet PDF文件第1页浏览型号HI-15530CLT的Datasheet PDF文件第2页浏览型号HI-15530CLT的Datasheet PDF文件第3页浏览型号HI-15530CLT的Datasheet PDF文件第5页浏览型号HI-15530CLT的Datasheet PDF文件第6页浏览型号HI-15530CLT的Datasheet PDF文件第7页 
HI-15530  
DECODER OPERATION  
The Decoder requires a single clock with a frequency of 12 looking for a new sync character to start another output  
times the desired data rate applied at the DECODER sequence. VALID WORD will go low approximately 20  
CLOCK input. The Manchester II coded data can be DECODER SHIFT CLOCK periods after it goes high if not  
presented to the Decoder in one of two ways. The reset low sooner by a valid sync and two valid Manchester  
BIPOLAR ONE and BIPOLAR ZERO inputs will accept bits as shown (1). At any time in the above sequence, a  
data from a comparator sensed transformer coupled bus as  
high input on DECODER RESET during a low-to-high  
specified in MIL-STD-1553. The UNIPOLAR DATA input transition of DECODER SHIFT CLOCK will abort  
can only accept non-inverted Manchester II coded data transmission and initialize the Decoder to start looking for a  
(e.g. from BIPOLAR ZERO OUT of an Encoder). The new sync character.  
Decoder is free running and continuously monitors its data  
input lines for a valid sync character and two valid  
Manchester data bits to start an output cycle. When a valid  
TAKE DATA  
UNIPOLAR  
DATA IN  
sync is recognized (1), the type of sync is indicated on  
BIPOLAR  
ONE IN  
TRANSITION  
FINDER  
CHARACTER  
IDENTIFIER  
COMMAND/DATA SYNC output. If the sync character was  
a command sync, this output will go high (2) and remain  
high for sixteen DECODER SHIFT CLOCK periods (3),  
otherwise it will remain low. The TAKE DATA output will go  
high and remain high (2) - (3) while the Decoder is  
transmitting the decoded data through SERIAL DATA OUT.  
The decoded data available at SERIAL DATA OUT is in a  
NRZ format. The DECODER SHIFT CLOCK is provided so  
that the decoded bits can be shifted into an external register  
on every low-to-high transition of this clock (2) - (3). After all  
sixteen decoded bits have been transmitted (3) the data is  
checked for odd parity. A high on VALID WORD output (4)  
indicates a successful reception of a word without any  
Manchester or parity errors. At this time the Decoder is  
COMMAND/DATA  
SYNC  
BIPOLAR  
ZERO IN  
SERIAL DATA  
OUT  
VALID  
WORD  
BIT  
RATE  
CLK  
DECODER  
CLK  
PARITY  
CHECK  
SYNCHRONIZER  
DECODER  
SHIFT CLK  
MASTER  
RESET  
DECODER  
RESET  
BIT  
COUNTER  
TIMING  
0
1
2
3
4
5
6
7
8
16  
17  
18  
19  
DECODER  
SHIFT CLK  
BIPOLAR  
ONE IN  
SYNC  
SYNC  
SYNC  
SYNC  
15  
15  
14  
14  
13  
13  
12  
12  
11  
11  
10  
10  
2
2
1
1
0
0
P
P
BIPLOAR  
ZERO IN  
TAKE DATA  
COMMAND /  
DATA SYNC  
SERIAL  
DATA OUT  
UNDEFINED  
15  
14  
13  
12  
4
3
2
1
0
May be high from previous reception  
VALID WORD  
(1)(2)  
(3)  
(4)  
HOLT INTEGRATED CIRCUITS  
4
1234567...11

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