HI-565A
Data Sheet
June 1999
File Number 3109.2
High Speed, Monolithic D/A Converter
with Reference
Features
• 12-Bit DAC and Reference on a Single Chip
• Pin Compatible With AD565A
The HI-565A is a fast, 12-bit, current output, digital-to-analog
converter. The monolithic chip includes a precision voltage
reference, thin-film R2R ladder, reference control amplifier
and twelve high speed bipolar current switches.
• Very High Speed: Settles to ±0.5 LSB in 250ns (Max)
Full Scale Switching Time 30ns (Typ)
• Guaranteed For Operation With ±12V Supplies
• Monotonicity Guaranteed Over Temperature
The Intersil dielectric isolation process provides latch free
operation while minimizing stray capacitance and leakage
currents, to produce an excellent combination of speed and
accuracy. Also, ground currents are minimized to produce a
low and constant current through the ground terminal, which
reduces error due to code dependent ground currents.
• Nonlinearity Guaranteed Over Temp (Max) . . . . ±0.5 LSB
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• Low Gain Drift (Max, DAC Plus Ref) . . . . . . . . .25ppm/ C
• Low Power Dissipation . . . . . . . . . . . . . . . . . . . . .250mW
HI-565A dice are laser trimmed for a maximum integral
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Applications
nonlinearity error of ±0.5 LSB at 25 C. In addition, the low
noise buried zener reference is trimmed both for absolute
value and temperature coefficient. Power dissipation is
typically 250mW, with ±15V supplies.
• CRT Displays
• High Speed A/D Converters
• Signal Reconstruction
• Waveform Synthesis
The HI-565A is offered in both commercial and military
grades. See Ordering Information.
Ordering Information
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PART NUMBER
LINEARITY (INL)
LINEARITY (DNL)
0.75 LSB
TEMP. RANGE ( C)
PACKAGE
24 Ld SBDIP
PKG. NO.
D24.6
HI1-565AJD-5
0.50 LSB
0 to 75
HI1-565AKD-5
HI1-565ASD-2
HI1-565ATD-2
0.25 LSB
0.50 LSB
0 to 75
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
D24.6
D24.6
D24.6
D24.6
D24.6
0.50 LSB
0.75 LSB
-55 to 125
-55 to 125
-55 to 125
-55 to 125
0.25 LSB
0.50 LSB
HI1-565ASD/883
HI1-565ATD/883
0.50 LSB
0.50 LSB
0.25 LSB
0.50 LSB
Pinout
Functional Diagram
HI-565A (SBDIP)
REF
OUT
TOP VIEW
8
11
20V
V
CC
3
BIP. OFF
SPAN
NC
NC
1
2
3
4
5
6
7
8
9
24
4
+
BIT 1 (MSB) IN
HI-565A
0.5mA
5K
5K
23 BIT 2 IN
10
9
10V
SPAN
9.95K
V
22 BIT 3 IN
21 BIT 4 IN
20 BIT 5 IN
19 BIT 6 IN
18 BIT 7 IN
17 BIT 8 IN
16 BIT 9 IN
15 BIT 10 IN
14 BIT 11 IN
13 BIT 12 (LSB) IN
I
CC
REF
-
REF
IN
REF OUT (+10V)
DAC
19.95K
6
REF GND
REF IN
I
OUT
O
+
-
(4X I
X CODE)
3.5K
3K
REF
2.5K
5
-V
EE
REF
GND
BIPOLAR R IN
IDAC OUT
7
12
24 . . .
. . .13
LSB
10V SPAN R 10
20V SPAN R 11
POWER GND 12
-V
PWR MSB
GND
EE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
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