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HH80547RE072CN/SL8H9 PDF预览

HH80547RE072CN/SL8H9

更新时间： 2024-01-24 00:48:16
品牌 Logo 应用领域
英特尔 - INTEL 外围集成电路
页数 文件大小 规格书
94页 2796K
描述
RISC Microprocessor, 32-Bit, 2800MHz, CMOS, PBGA775

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HH80547RE072CN/SL8H9 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：LGA, LGA775,30X33,46/43Reach Compliance Code：unknown
HTS代码：8542.31.00.01风险等级：5.84
位大小：32JESD-30 代码：R-PBGA-N775
端子数量：775封装主体材料：PLASTIC/EPOXY
封装代码：LGA封装等效代码：LGA775,30X33,46/43
封装形状：RECTANGULAR封装形式：GRID ARRAY
电源：1.3 V认证状态：Not Qualified
速度：2800 MHz子类别：Microprocessors
最大压摆率：78000 mA标称供电电压：1.3 V
表面贴装：YES技术：CMOS
端子形式：NO LEAD端子节距：1.1 mm
端子位置：BOTTOMuPs/uCs/外围集成电路类型：MICROPROCESSOR, RISC
Base Number Matches：1

HH80547RE072CN/SL8H9 数据手册

 浏览型号HH80547RE072CN/SL8H9的Datasheet PDF文件第88页浏览型号HH80547RE072CN/SL8H9的Datasheet PDF文件第89页浏览型号HH80547RE072CN/SL8H9的Datasheet PDF文件第90页浏览型号HH80547RE072CN/SL8H9的Datasheet PDF文件第91页浏览型号HH80547RE072CN/SL8H9的Datasheet PDF文件第92页浏览型号HH80547RE072CN/SL8H9的Datasheet PDF文件第94页 
Debug Tools Specifications  
8 Debug Tools Specifications  
Refer to the ITP700 Debug Port Design Guide for information regarding debug tools  
specifications. The ITP700 Debug Port Design Guide is located on http://developer.intel.com.  
8.1  
Logic Analyzer Interface (LAI)  
Intel is working with two logic analyzer vendors to provide logic analyzer interfaces (LAIs) for use  
in debugging Celeron D processor in the 775-land package systems. Tektronix* and Agilent*  
should be contacted to get specific information about their logic analyzer interfaces. The following  
information is general in nature. Specific information must be obtained from the logic analyzer  
vendor.  
Due to the complexity of Celeron D processor in the 775-land package systems, the LAI is critical  
in providing the ability to probe and capture FSB signals. There are two sets of considerations to  
keep in mind when designing a Celeron D processor in the 775-land package system that can make  
use of an LAI: mechanical and electrical.  
8.1.1  
Mechanical Considerations  
The LAI is installed between the processor socket and the Celeron D processor in the 775-land  
package. The LAI lands plug into the socket, while the Celeron D processor in the 775-land  
package lands plug into a socket on the LAI. Cabling that is part of the LAI egresses the system to  
allow an electrical connection between the Celeron D processor in the 775-land package and a  
logic analyzer. The maximum volume occupied by the LAI, known as the keep-out volume, as well  
as the cable egress restrictions, should be obtained from the logic analyzer vendor. System  
designers must make sure that the keep-out volume remains unobstructed inside the system. Note  
that it is possible that the keep-out volume reserved for the LAI may differ from the space normally  
occupied by the Celeron D processor in the 775-land package heatsink. If this is the case, the logic  
analyzer vendor will provide a cooling solution as part of the LAI.  
8.1.2  
Electrical Considerations  
The LAI will also affect the electrical performance of the FSB; therefore, it is critical to obtain  
electrical load models from each of the logic analyzers to be able to run system level simulations to  
prove that their tool will work in the system. Contact the logic analyzer vendor for electrical  
specifications and load models for the LAI solution they provide.  
§
Datasheet  
93  
1...9091929394

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