Datasheet > HDMI2C1-6C1

HDMI2C1-6C1

更新时间： 2023-12-20 18:45:39

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
22页	1156K
描述
HDMI?源控制级接口的ESD保护和信号增强器

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HDMI2C1-6C1 数据手册

HDMI2C1-6C1

DDC bus description

In case the application is in standby mode, the +5V main supply of the application is generally powered off in

order to reduce as much as possible the global power consumption. The CEC driver can be the only device

still working in low power mode, allowing a wake-up of the whole application through the CEC line. When the

main power supply +5V is switched off, and if the CEC bus is still active (VDD_CEC power in on state), the

HDMI2C1-6C1 keeps the CEC bus working properly while all other outputs are put in high-Z mode.

The CEC output (cable side) integrates a protection against ESD, which is compliant with the IEC61000-4-2

standard, level 4 (8 kV contact).

2.2

DDC bus description

The DDC bus is described in the HDMI standards as the display data channel. The topology corresponds to an

I2C bus that must be compliant with the I2C bus specification UM10204 revision 5 (October 2012). The DDC bus

is made of two lines: data line (SDA) and clock line (SCL). It is used to create a point to point communication link

from the source to the sink. EEDID and HDCP protocols are especially flowing through this link, making this I2C

communication channel a key element in the HDMI application.

The DDC block integrated in the HDMI2C1-6C1 allows a bidirectional communication between the cable and the

ASIC. It is fully compliant with the HDMI 1.4 standard (I2C bus specification) and its CTS. It is shifting the 5 V

voltage from the cable (V5V_OUT) down to the ASIC voltage level (VDD_IC) that can be as low as 1.8 V.

The Figure 4. DDC buffer functional diagram (SCL and SDA lines) shows the functional diagram of the DDC block

integrated in the HDMI2C1-6C1 device.

Figure 4. DDC buffer functional diagram (SCL and SDA lines)

VDD_IC

+5V

decoupling

capacitance

VDD_5V

VDD_IC

5V_OUT

UVLO

5V_OUT

HDMI

ASIC

5V_OUT

Enable

SCL_IC

SDA_IC

SCL

SDA

reshaping

circuit

HDMI

connector

Drive

The Figure 5. Simplified view of the electrical parameters of the DDC block illustrates the electrical parameter of

the DDC block specified by the Table 7. DDC bus (SDA and SCL) line electrical characteristics (T_amb= 25 °C,

V_{DD_5V}= 5 V, V_{DD_IC}= 1.8 V, unless otherwise specified).

DS9943 - Rev 4

page 4/22

1 2 345 6 7...22

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