HD74HC108FP-EL

更新时间： 2024-10-05 13:08:15

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HD74HC108FP-EL 数据手册

HD74HC108

Dual J-K Flip-Flops (with Preset, Common Clear and Common

Clock)

Description

This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock

pulse. Each flip-flop has independent J, K, and preset inputs and Q and Q outputs. Two flip-flops are

controlled by a common clear and a common clock. Preset and clear are independent of the clock and

accomplished by a low logic level on the corresponding input.

Features

•

High Speed Operation: t_pd(Clock to Q) = 20 ns typ (C_L= 50 pF)

High Output Current: Fanout of 10 LSTTL Loads

Wide Operating Voltage: V_CC= 2 to 6 V

Low Input Current: 1 µA max

Low Quiescent Supply Current: I_CC(static) = 2 µA max (Ta = 25°C)

12 3 4 5 6 7...9

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型号	品牌	获取价格	描述	数据表
HD74HC108P	ETC	获取价格	FLIP-FLOP\|DUAL\|J/K TYPE\|HC-CMOS\|DIP\|14PIN\|PLASTIC
HD74HC108RP	ETC	获取价格	FLIP-FLOP\|DUAL\|J/K TYPE\|HC-CMOS\|SOP\|14PIN\|PLASTIC
HD74HC108RPEL	RENESAS	获取价格	Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)
HD74HC108RP-EL	RENESAS	获取价格	HC/UH SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, FP-14DN
HD74HC108RP-EL	HITACHI	获取价格	J-K Flip-Flop, HC/UH Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output,
HD74HC108T	ETC	获取价格	FLIP-FLOP\|DUAL\|J/K TYPE\|HC-CMOS\|TSSOP\|14PIN\|PLASTIC
HD74HC108T-EL	RENESAS	获取价格	暂无描述
HD74HC108T-EL	HITACHI	获取价格	J-K Flip-Flop, HC/UH Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output,
HD74HC109	RENESAS	获取价格	Dual J-K Flip-Flops (with Preset and Clear)
HD74HC109	HITACHI	获取价格	Dual J-K Flip-Flops (with Preset and Clear)