2.7 CPU States...................................................................................................................... 48
2.7.1 Overview........................................................................................................... 48
2.7.2 Program Execution State.................................................................................... 50
2.7.3 Program Halt State............................................................................................. 50
2.7.4 Exception-Handling State .................................................................................. 50
2.8 Memory Map.................................................................................................................. 51
2.8.1 Memory Map...................................................................................................... 51
2.9 Application Notes ........................................................................................................... 57
2.9.1 Notes on Data Access ........................................................................................ 57
2.9.2 Notes on Bit Manipulation................................................................................. 59
2.9.3 Notes on Use of the EEPMOV Instruction ......................................................... 65
Section 3 Exception Handling........................................................................67
3.1 Overview ........................................................................................................................ 67
3.2 Reset............................................................................................................................... 67
3.2.1 Overview........................................................................................................... 67
3.2.2 Reset Sequence.................................................................................................. 67
3.2.3 Interrupt Immediately after Reset ...................................................................... 69
3.3 Interrupts ........................................................................................................................ 69
3.3.1 Overview........................................................................................................... 69
3.3.2 Interrupt Control Registers................................................................................. 71
3.3.3 External Interrupts............................................................................................. 80
3.3.4 Internal Interrupts .............................................................................................. 80
3.3.5 Interrupt Operations........................................................................................... 81
3.3.6 Interrupt Response Time.................................................................................... 86
3.4 Application Notes ........................................................................................................... 86
3.4.1 Notes on Stack Area Use ................................................................................... 86
3.4.2 Notes on Rewriting Port Mode Registers ........................................................... 88
Section 4 Clock Pulse Generators...................................................................93
4.1 Overview ........................................................................................................................ 93
4.1.1 Block Diagram .................................................................................................. 93
4.1.2 System Clock and Subclock............................................................................... 93
4.2 System Clock Generator ................................................................................................. 94
4.3 Subclock Generator......................................................................................................... 98
4.4 Prescalers........................................................................................................................ 100
4.5 Note on Oscillators ......................................................................................................... 101
Section 5 Power-Down Modes........................................................................103
5.1 Overview ........................................................................................................................ 103
5.1.1 System Control Registers................................................................................... 106
ii
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