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HD26LS32A PDF预览

HD26LS32A

更新时间: 2024-12-01 11:03:59
品牌 Logo 应用领域
日立 - HITACHI /
页数 文件大小 规格书
5页 39K
描述
Quadruple Differential Line Receivers With 3 State Outputs

HD26LS32A 数据手册

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HD26LS32A  
Quadruple Differential Line Receivers With 3 State Outputs  
The HD26LS32A features quadruple line receivers  
Pin Arrangement  
designed to meet the specs of EIA standard RS-  
422A and RS-423. This device operates from a  
single 5 V power supply. The enable function is  
common to all four receivers and offers a choice  
of active high or active low input. Fail safe design  
ensures that if the inputs are open, the outputs will  
always be high.  
1B  
1A  
1Y  
1
2
3
4
5
6
7
8
16  
VCC  
15 4B  
14  
4A  
4Y  
Enable  
G
13  
12  
Enable  
G
2Y  
2A  
2B  
11  
10  
9
3Y  
3A  
3B  
Logic Diagram  
GND  
1A  
1Y  
1B  
(Top View)  
2A  
2Y  
2B  
Function Table  
3A  
3Y  
3B  
Enable  
Output  
Y
Differential Input  
A – B  
G
H
G
X
H
VID VTH  
4A  
4Y  
4B  
X
H
X
H
X
L
L
X
L
H
?
VTL < VID < VTH  
Enable G  
Enable G  
?
X
L
VID VTL  
L
L
X
H
Z
H :  
L :  
X :  
? :  
High level  
Low level  
Immaterial  
Irrelevant  
:
Z
High impedance  

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