Datasheet > HCS11MS

HCS11MS

更新时间： 2023-12-20 18:45:58

品牌	Logo	应用领域
瑞萨 - RENESAS		栅
页数	文件大小	规格书
7页	305K
描述
CMOS Triple 3-Input AND Gate

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HCS11MS 数据手册

DATASHEET

HCS11MS

Radiation Hardened Triple 3-Input AND Gate

FN3048

Rev 0.00

November 1994

Features

Pinouts

14 PIN CERAMIC DUAL-IN-LINE

MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K or 1 Mega-RAD(Si)

• Dose Rate Upset >10¹⁰RAD(Si)/s 20ns Pulse

TOP VIEW

• Cosmic Ray Upset Immunity < 2 x 10^-9Errors/Gate Day

(Typ)

14 VCC

13 C1

12 Y1

11 C3

10 B3

• Latch-Up Free Under Any Conditions

• Military Temperature Range: -55^oC to +125^oC

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

GND

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current Levels Ii  5A at VOL, VOH

14 PIN CERAMIC FLAT PACK

MIL-STD-1835 DESIGNATOR CDFP3-F14, LEAD FINISH C

TOP VIEW

Description

The Intersil HCS11MS is a Radiation Hardened Triple 3-

Input AND Gate. A high on all inputs forces the output to a

High state.

VCC

The HCS11MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS11MS is supplied in a 14 lead Weld Seal Ceramic

flatpack (K suffix) or a Weld Seal Ceramic Dual-In-Line

Package (D suffix).

GND

Truth Table

Functional Diagram

INPUTS

OUTPUTS

(1, 3, 9)

(12, 6, 8)

(2, 4, 10)

(13, 5, 11)

NOTE: L = Logic Level Low, H = Logic level High

FN3048 Rev 0.00

November 1994

Page 1 of 7

12 3 4 5 6 7

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