GS8640F18/32/36GT-6.5
TQFP Pin Description
Symbol
A0, A1
A
Type
Description
I
I
Address field LSBs and Address Counter preset Inputs
Address Inputs
DQA
DQB
DQC
DQD
I/O
Data Input and Output pins
NC
BW
No Connect
I
I
I
I
I
I
I
I
I
I
I
I
I
Byte Write—Writes all enabled bytes; active low
Byte Write Enable for DQA, DQB Data I/Os; active low
Byte Write Enable for DQC, DQD Data I/Os; active low
Clock Input Signal; active high
BA, BB
BC, BD
CK
GW
Global Write Enable—Writes all bytes; active low
Chip Enable; active low
E1, E3
E2
Chip Enable; active high
G
Output Enable; active low
ADV
Burst address counter advance enable; active low
Address Strobe (Processor, Cache Controller); active low
Sleep Mode control; active high
ADSP, ADSC
ZZ
LBO
Linear Burst Order mode; active low
Core power supply
VDD
VSS
I
I
I/O and Core Ground
VDDQ
Output driver power supply
Rev: 1.00 10/2013
5/22
© 2013, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.