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GS8322Z36AB-150I PDF预览

GS8322Z36AB-150I

更新时间: 2024-09-28 18:43:15
品牌 Logo 应用领域
GSI 时钟静态存储器内存集成电路
页数 文件大小 规格书
37页 522K
描述
ZBT SRAM, 1MX36, 7.5ns, CMOS, PBGA119, 14 X 22 MM, 1.27 MM PITCH, FPBGA-119

GS8322Z36AB-150I 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:BGA
包装说明:BGA, BGA119,7X17,50针数:119
Reach Compliance Code:compliantECCN代码:3A991.B.2.B
HTS代码:8542.32.00.41Factory Lead Time:8 weeks
风险等级:5.08最长访问时间:7.5 ns
其他特性:ALSO OPERATES AT 3.3V SUPPLY, PIPELINED ARCHITECTURE, FLOW THROUGH最大时钟频率 (fCLK):150 MHz
I/O 类型:COMMONJESD-30 代码:R-PBGA-B119
JESD-609代码:e0长度:22 mm
内存密度:37748736 bit内存集成电路类型:ZBT SRAM
内存宽度:36功能数量:1
端子数量:119字数:1048576 words
字数代码:1000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:1MX36输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA119,7X17,50封装形状:RECTANGULAR
封装形式:GRID ARRAY并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.5/3.3 V
认证状态:Not Qualified座面最大高度:1.99 mm
最大待机电流:0.04 A最小待机电流:2.3 V
子类别:SRAMs最大压摆率:0.195 mA
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:1.27 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:14 mm
Base Number Matches:1

GS8322Z36AB-150I 数据手册

 浏览型号GS8322Z36AB-150I的Datasheet PDF文件第2页浏览型号GS8322Z36AB-150I的Datasheet PDF文件第3页浏览型号GS8322Z36AB-150I的Datasheet PDF文件第4页浏览型号GS8322Z36AB-150I的Datasheet PDF文件第5页浏览型号GS8322Z36AB-150I的Datasheet PDF文件第6页浏览型号GS8322Z36AB-150I的Datasheet PDF文件第7页 
GS8322Z18/36A(B/D)-400/375/333/250/200/150  
400 MHz150 MHz  
119 & 165 BGA  
Commercial Temp  
Industrial Temp  
36Mb Pipelined and Flow Through  
Synchronous NBT SRAM  
2.5 V or 3.3 V V  
DD  
2.5 V or 3.3 V I/O  
Features  
Because it is a synchronous device, address, data inputs, and  
read/write control inputs are captured on the rising edge of the  
input clock. Burst order control (LBO) must be tied to a power  
rail for proper operation. Asynchronous inputs include the  
Sleep mode enable (ZZ) and Output Enable. Output Enable can  
be used to override the synchronous control of the output  
drivers and turn the RAM's output drivers off at any time.  
Write cycles are internally self-timed and initiated by the rising  
edge of the clock input. This feature eliminates complex off-  
chip write pulse generation required by asynchronous SRAMs  
and simplifies input signal timing.  
• NBT (No Bus Turn Around) functionality allows zero wait  
Read-Write-Read bus utilization; fully pin-compatible with  
both pipelined and flow through NtRAM™, NoBL™ and  
ZBT™ SRAMs  
• 2.5 V or 3.3 V +10%/–10% core power supply  
• 2.5 V or 3.3 V I/O supply  
• User-configurable Pipeline and Flow Through mode  
• ZQ mode pin for user-selectable high/low output drive  
• IEEE 1149.1 JTAG-compatible Boundary Scan  
• LBO pin for Linear or Interleave Burst mode  
• Pin-compatible with 2Mb, 4Mb, 8Mb, and 16Mb devices  
• Byte write operation (9-bit Bytes)  
• 3 chip enable signals for easy depth expansion  
• ZZ Pin for automatic power-down  
• JEDEC-standard 119-bump and 165-bump BGA packages  
• RoHS-compliant packages available  
The GS8322Z18/36A may be configured by the user to  
operate in Pipeline or Flow Through mode. Operating as a  
pipelined synchronous device, in addition to the rising-edge-  
triggered registers that capture input signals, the device  
incorporates a rising edge triggered output register. For read  
cycles, pipelined SRAM output data is temporarily stored by  
the edge-triggered output register during the access cycle and  
then released to the output drivers at the next rising edge of  
clock.  
Functional Description  
The GS8322Z18/36A is a 36Mbit Synchronous Static SRAM.  
GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other  
pipelined read/double late write or flow through read/single  
late write SRAMs, allow utilization of all available bus  
bandwidth by eliminating the need to insert deselect cycles  
when the device is switched from read to write cycles.  
The GS8322Z18/36A is implemented with GSI's high  
performance CMOS technology and is available in a JEDEC-  
standard 119-bump or 165-bump BGA package.  
Parameter Synopsis  
-400  
-375  
-333  
-250  
-200  
-150  
Unit  
t
2.5  
2.5  
2.5  
2.66  
2.5  
3.3  
2.5  
4.0  
3.0  
5.0  
3.8  
6.7  
ns  
ns  
KQ  
Pipeline  
3-1-1-1  
tCycle  
Curr (x18)  
Curr (x36)  
395  
475  
390  
455  
355  
415  
280  
335  
240  
280  
205  
230  
mA  
mA  
t
4.0  
4.0  
4.2  
4.2  
4.5  
4.5  
5.5  
5.5  
6.5  
6.5  
7.5  
7.5  
ns  
ns  
KQ  
Flow  
Through  
2-1-1-1  
tCycle  
Curr (x18)  
Curr (x36)  
290  
335  
275  
320  
260  
305  
235  
270  
200  
240  
190  
220  
mA  
mA  
Rev: 1.03 8/2013  
1/37  
© 2011, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  

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