Datasheet > GS8322Z18GC-166

GS8322Z18GC-166

更新时间： 2024-09-28 10:54:43

品牌	Logo	应用领域
GSI		静态存储器
页数	文件大小	规格书
42页	1054K
描述
ZBT SRAM, 2MX18, 8.5ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209

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GS8322Z18GC-166 数据手册

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GS8322Z18(B/C)/GS8322Z36(B/C)/GS8322Z72(C)

119 and 209 BGA

Commercial Temp

Industrial Temp

250 MHz–133 MHz

36Mb Pipelined and Flow Through

Synchronous NBT SRAM

2.5 V or 3.3 V V

2.5 V or 3.3 V I/O

input clock. Burst order control (LBO) must be tied to a power

rail for proper operation. Asynchronous inputs include the

Sleep mode enable (ZZ) and Output Enable. Output Enable can

be used to override the synchronous control of the output

drivers and turn the RAM's output drivers off at any time.

Write cycles are internally self-timed and initiated by the rising

edge of the clock input. This feature eliminates complex off-

chip write pulse generation required by asynchronous SRAMs

and simplifies input signal timing.

Features

• NBT (No Bus Turn Around) functionality allows zero wait

Read-Write-Read bus utilization; fully pin-compatible with

both pipelined and flow through NtRAM™, NoBL™ and

ZBT™ SRAMs

• 2.5 V or 3.3 V +10%/–5% core power supply

• 2.5 V or 3.3 V I/O supply

• User-configurable Pipeline and Flow Through mode

• ZQ mode pin for user-selectable high/low output drive

• IEEE 1149.1 JTAG-compatible Boundary Scan

• On-chip write parity checking; even or odd selectable

• On-chip parity encoding and error detection

• LBO pin for Linear or Interleave Burst mode

• Pin-compatible with 2Mb, 4Mb, 8Mb, and 16Mb devices

• Byte write operation (9-bit Bytes)

The GS8322Z18/36/72 may be configured by the user to

operate in Pipeline or Flow Through mode. Operating as a

pipelined synchronous device, in addition to the rising-edge-

triggered registers that capture input signals, the device

incorporates a rising edge triggered output register. For read

cycles, pipelined SRAM output data is temporarily stored by

the edge-triggered output register during the access cycle and

then released to the output drivers at the next rising edge of

clock.

• 3 chip enable signals for easy depth expansion

• ZZ Pin for automatic power-down

• JEDEC-standard 119- or 209-Bump BGA package

The GS8322Z18/36/72 is implemented with GSI's high

performance CMOS technology and is available in a JEDEC-

standard 119-bump or 209-bump BGA package.

-250 -225 -200 -166 -150 -133 Unit

Pipeline

3-1-1-1

t_KQ

tCycle

2.3 2.5 3.0 3.5 3.8 4.0 ns

4.0 4.4 5.0 6.0 6.6 7.5 ns

Curr (x18) 365 335 305 265 245 215 mA

Curr (x36) 560 510 460 400 370 330 mA

Curr (x72) 660 600 540 460 430 380 mA

3.3 V

2.5 V

Curr (x18) 360 330 305 260 240 215 mA

Curr (x36) 550 500 460 390 360 330 mA

Curr (x72) 640 590 530 450 420 370 mA

Flow

Through

2-1-1-1

t_KQ

tCycle

6.0 6.5 7.5 8.5 10 11 ns

7.0 7.5 8.5 10 10 15 ns

Curr (x18) 235 230 210 200 195 150 mA

Curr (x36) 300 300 270 270 270 200 mA

Curr (x72) 350 350 300 300 300 220 mA

3.3 V

2.5 V

Curr (x18) 235 230 210 200 195 145 mA

Curr (x36) 300 300 270 270 270 190 mA

Curr (x72) 340 340 300 300 300 220 mA

Functional Description

The GS8322Z18/36/72 is a 36Mbit Synchronous Static

SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or

other pipelined read/double late write or flow through read/

single late write SRAMs, allow utilization of all available bus

bandwidth by eliminating the need to insert deselect cycles

when the device is switched from read to write cycles.

Because it is a synchronous device, address, data inputs, and

read/write control inputs are captured on the rising edge of the

Rev: 1.00 10/2001

1/42

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

NoBL is a trademark of Cypress Semiconductor Corp.. NtRAM is a trademark of Samsung Electronics Co.. ZBT is a trademark of Integrated Device Technology, Inc.

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与GS8322Z18GC-166相关器件

型号	品牌	获取价格	描述	数据表
GS8322Z18GC-166IT	GSI	获取价格	ZBT SRAM, 2MX18, 8.5ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209
GS8322Z18GC-200IT	GSI	获取价格	ZBT SRAM, 2MX18, 7.5ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209
GS8322Z18GC-225	GSI	获取价格	ZBT SRAM, 2MX18, 6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209
GS8322Z18GC-225IT	GSI	获取价格	ZBT SRAM, 2MX18, 6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209
GS8322Z18GC-250	GSI	获取价格	ZBT SRAM, 2MX18, 6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209
GS8322Z18GC-250I	GSI	获取价格	ZBT SRAM, 2MX18, 6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209
GS8322Z18GC-250IT	GSI	获取价格	ZBT SRAM, 2MX18, 6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209
GS8322Z18GE-133IV	GSI	获取价格	36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322Z18GE-133V	GSI	获取价格	36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322Z18GE-133VT	GSI	获取价格	ZBT SRAM, 2MX18, 8.5ns, CMOS, PBGA165, 15 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165

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