GS8182T08/09/18/36BD-400/375/333/300/250/200/167
Pin Description Table
Symbol
SA
Description
Type
Input
Input
Comments
Synchronous Address Inputs
Read/Write Control Pin
—
R/W
Write Active Low; Read Active High
Active Low
x18/x36 only
BW0–BW3
NW0–NW1
BW
Synchronous Byte Writes
Nybble Write Control Pin
Byte Write Control Pin
Input
Input
Input
Active Low
x8 only
Active Low
x9 only
LD
K
Synchronous Load Pin
Input Clock
Input
Input
Active Low
Active High
K
Input Clock
Input
Active Low
C
Output Clock
Input
Active High
C
Output Clock
Input
Active Low
TMS
TDI
TCK
TDO
VREF
Test Mode Select
Test Data Input
Input
—
Input
—
Test Clock Input
Input
—
Test Data Output
HSTL Input Reference Voltage
Output Impedance Matching Input
Data I/O
Output
Input
—
—
—
ZQ
DQ
Input
Input/Output
Input
Three State
Active Low
—
Disable DLL when low
Output Echo Clock
Output Echo Clock
Power Supply
Doff
CQ
Output
Output
Supply
CQ
—
VDD
1.8 V Nominal
VDDQ
VSS
Isolated Output Buffer Supply
Power Supply: Ground
No Connect
Supply
Supply
—
1.5 V or 1.8 V Nominal
—
—
NC
Notes:
1. NC = Not Connected to die or any other pin
2. When ZQ pin is directly connected to V , output impedance is set to minimum value and it cannot be connected to ground or left
DDQ
unconnected.
3. C, C, K, K cannot be set to VREF voltage.
Rev: 1.04c 11/2011
6/36
© 2007, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.