Datasheet > GS81302TT37GE-450

GS81302TT37GE-450

更新时间： 2023-11-02 19:29:15

品牌	Logo	应用领域
GSI		/
页数	文件大小	规格书
30页	431K
描述
165 BGA

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GS81302TT37GE-450 数据手册

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GS81302TT07/10/19/37E-450/400/350/333/300

Pin Description Table

Symbol

Description

Type

Comments

Synchronous Address Inputs

Input

—

High: Read

Low: Write

R/W

Synchronous Read

Input

BW0–BW3

Synchronous Byte Writes

Synchronous Load Pin

Input Clock

Input

Active Low

Input

Active High

Input Clock

Input

Active Low

TMS

TDI

Test Mode Select

Input

—

Test Data Input

Input

—

TCK

TDO

V_REF

Test Clock Input

Input

—

Test Data Output

Output

Input

—

HSTL Input Reference Voltage

Output Impedance Matching Input

Must Connect Low

Data I/O

—

MCL

Input

—

Input/Output

Input

Three State

Active Low

—

Disable DLL when low

Output Echo Clock

Power Supply

Doff

Output

Supply

—

V_DD

1.8 V Nominal

V_DDQ

V_SS

Isolated Output Buffer Supply

Power Supply: Ground

Q Valid Output

Supply

Output

1.8 V or 1.5 V Nominal

—

QVLD

Low = Low Impedance Range

High/Float = High Impedance Range

ODT

On-Die Termination

No Connect

Input

—

Notes:

1. NC = Not Connected to die or any other pin

2. When ZQ pin is directly connected to V , output impedance is set to minimum value and it cannot be connected to ground or left

DDQ

unconnected.

3. K and K cannot be set to V

voltage.

REF

Rev: 1.00a 11/2011

6/30

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

1...3 4 567 8 9...30

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