Datasheet > GS81302TT37AGD-400I

GS81302TT37AGD-400I

更新时间： 2023-12-06 20:13:35

品牌	Logo	应用领域
GSI		/
页数	文件大小	规格书
25页	689K
描述
165 BGA

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GS81302TT37AGD-400I 数据手册

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GS81302TT19/37AGD-450/400/375/333

JTAG TAP Instruction Set Summary

Instruction

EXTEST

Code

000

Description

Notes

Places the Boundary Scan Register between TDI and TDO.

Preloads ID Register and places it between TDI and TDO.

IDCODE

001

1, 2

Captures I/O ring contents. Places the Boundary Scan Register between TDI and TDO.

Forces all RAM output drivers to High-Z.

SAMPLE-Z

010

GSI

SAMPLE/PRELOAD

GSI

011

100

101

110

111

GSI private instruction.

Captures I/O ring contents. Places the Boundary Scan Register between TDI and TDO.

GSI private instruction.

GSI

GSI private instruction.

BYPASS

Places Bypass Register between TDI and TDO.

Notes:

1. Instruction codes expressed in binary, MSB on left, LSB on right.

2. Default instruction automatically loaded at power-up and in test-logic-reset state.

JTAG Port Recommended Operating Conditions and DC Characteristics

Parameter

Symbol

Min.

–0.3

Max.

Unit Notes

V_ILJ

0.3 * V_DD

Test Port Input Low Voltage

V_IHJ

I_INHJ

0.7 * V_DD

V_DD+0.3

Test Port Input High Voltage

TMS, TCK and TDI Input Leakage Current

TDO Output Leakage Current

Test Port Output High Voltage

Test Port Output Low Voltage

Test Port Output CMOS High

Test Port Output CMOS Low

–300

–1

I_INLJ

100

I_OLJ

–1

V_OHJ

V_OLJ

V_OHJC

V_OLJC

V_DD– 0.2

—

0.2

—

0.1

5, 6

5, 7

5, 8

5, 9

—

V_DD– 0.1

—

Notes:

1. Input Under/overshoot voltage must be –1 V < Vi < V_DDn+1 V not to exceed 2.9 V maximum, with a pulse width not to exceed 20% tTKC.

2. V_ILJ V_INV_DDn

3. 0 V V_INV_ILJn

4. Output Disable, V_OUT= 0 to V_DDn

5. The TDO output driver is served by the V_DDsupply.

6. I_OHJ= –2 mA

7. I_OLJ= + 2 mA

8. I_OHJC= –100 uA

9. I_OLJC= +100 uA

Rev: 1.01a 3/2019

22/25

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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