GS81302T07/10/19/37E-450/400/350/333/300
Pin Description Table
Symbol
Description
Type
Comments
SA
Synchronous Address Inputs
Input
—
High: Read
Low: Write
R/W
Synchronous Read
Input
BW0–BW3
LD
Synchronous Byte Writes
Synchronous Load Pin
Input Clock
Input
Input
Active Low
Active Low
K
Input
Active High
K
Input Clock
Input
Active Low
TMS
TDI
Test Mode Select
Input
—
Test Data Input
Input
—
TCK
TDO
VREF
Test Clock Input
Input
—
Test Data Output
Output
Input
—
HSTL Input Reference Voltage
Output Impedance Matching Input
Must Connect Low
Data I/O
—
ZQ
MCL
DQ
Input
—
—
—
Input/Output
Input
Three State
Active Low
—
Disable DLL when low
Output Echo Clock
Output Echo Clock
Power Supply
Doff
CQ
Output
Output
Supply
CQ
—
VDD
1.8 V Nominal
VDDQ
VSS
Isolated Output Buffer Supply
Supply
1.8 V or 1.5 V Nominal
Power Supply: Ground
Q Valid Output
Supply
Output
Input
—
—
QVLD
ODT
—
Active High
—
On-Die Termination
No Connect
NC
Notes:
1. NC = Not Connected to die or any other pin
2. When ZQ pin is directly connected to V , output impedance is set to minimum value and it cannot be connected to ground or left
DDQ
unconnected.
3. K and K cannot be set to V
voltage.
REF
Rev: 1.03a 11/2011
6/31
© 2011, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.