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GM76C256CLFW-55/E PDF预览

GM76C256CLFW-55/E

更新时间: 2023-01-15 00:00:00
品牌 Logo 应用领域
海力士 - HYNIX 静态存储器光电二极管
页数 文件大小 规格书
11页 93K
描述
Standard SRAM, 32KX8, 55ns, CMOS, PDSO28, SOP-28

GM76C256CLFW-55/E 数据手册

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GM76C256C Series  
DESCRIPTION  
FEATURES  
The GM76C256C is a high-speed, low power and  
32,786 X 8-bits CMOS Static Random Access  
·
·
·
·
Fully static operation and Tri-state output  
TTL compatible inputs and outputs  
Low power consumption  
Battery backup(L/LL-part)  
- 2.0V(min.) data retention  
Standard pin configuration  
- 28 pin 600mil PDIP  
- 28 pin 330mil SOP  
- 28 pin 8x13.4 mm TSOP-I  
(Standard)  
Memory fabricated using  
Hynix's high  
performance CMOS process technology. It is  
suitable for use in low voltage operation and  
battery back-up application. This device has a  
data retention mode that guarantees data to  
remain valid at the minimum power supply  
voltage of 2.0 volt.  
·
Product  
No.  
GM76C256C  
GM76C256CE  
Voltage  
(V)  
Speed  
(ns)  
55/70/85  
55/70/85  
Operation  
Current(mA)  
Standby Current(uA)  
Temperature  
(°C)  
0~70(Normal)  
-25~85(Extended)  
L
LL  
20  
30  
5.0  
5.0  
10  
10  
40  
60  
Note 1. Current value is max.  
PIN CONNECTION  
Vcc  
A14  
A12  
A7  
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
A14  
A12  
A7  
Vcc  
/WE  
A13  
A8  
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
/WE  
A13  
A8  
/OE  
A11  
A9  
A10  
3
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
3
/CS  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
Vss  
I/O3  
I/O2  
I/O1  
A0  
A6  
4
A6  
4
3
A5  
A9  
5
A5  
A9  
5
A8  
4
A4  
A11  
/OE  
A10  
/CS  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
6
A11  
/OE  
A10  
/CS  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
A4  
6
A13  
/WE  
Vcc  
A14  
A12  
A7  
5
A3  
7
A3  
7
6
A2  
8
A2  
7
8
A1  
8
9
A1  
9
9
A0  
A0  
10  
11  
12  
13  
14  
10  
11  
12  
13  
14  
10  
11  
12  
13  
14  
I/O1  
I/O2  
I/O3  
Vss  
I/O1  
I/O2  
I/O3  
Vss  
A6  
A5  
A4  
A1  
A3  
A2  
PDIP  
SOP  
TSOP-I(Standard)  
PIN DESCRIPTION  
BLOCK DIAGRAM  
ROW DECODER  
I/O1  
A0  
Pin Name  
Pin Function  
Chip Select  
Write Enable  
/CS  
/WE  
MEMORY ARRAY  
512x512  
/OE  
Output Enable  
Address Inputs  
Data Input/Output  
Power(+5.0V)  
Ground  
A0 ~ A14  
I/O1 ~ I/O8  
Vcc  
A14  
I/O8  
/CS  
Vss  
/OE  
/WE  
Rev 03 / Apr. 2000  
2

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