DDR4 SDRAM
GDQ2A8AA
7.7.4 Differential Input Cross Point Voltage......................................................................................................28
7.7.5 Differential Input Slew Rate Definition .....................................................................................................30
8
AC AND DC OUTPUT MEASUREMENT LEVELS............................................................................................31
8.1
Output Driver DC Electronic Characteristics ...............................................................................................31
8.1.1 Alert_n Output Driver Characteristic........................................................................................................33
8.1.2 Output Driver Characteristic of Connectivity Test (CT) Mode..................................................................34
8.2
Single-ended AC and DC Output Levels.....................................................................................................35
Differential AC&DC Output Levels ..............................................................................................................35
Single-ended Output Slew Rate ..................................................................................................................36
Differential Output Slew Rate ......................................................................................................................37
Single-ended AC& DC Output Levels of Connectivity Test Mode...............................................................38
Reference Load for Connectivity Test Mode Timing ...................................................................................38
8.3
8.4
8.5
8.6
8.7
9
SPEED BIN.........................................................................................................................................................39
9.1
DDR4-2400 Speed Bins and Operations ....................................................................................................39
DDR4-2666 Speed Bins and Operations ....................................................................................................40
DDR4-3200 Speed Bins and Operations ....................................................................................................41
tREFI and tRFC Parameters.............................................................................................................................42
9.2
9.3
9.4
10
IDD AND IDDQ SPECIFICATION PARAMETERS AND TEST CONDITIONS...................................................44
10.1 IDD, IPP and IDDQ Measurement Conditions...................................................................................................44
10.1.1 IDD0, IDD0A and IPP0 Measurement-Loop Pattern....................................................................................54
10.1.2 IDD1, IDD1A and IPP1 Measurement-Loop Pattern....................................................................................54
10.1.3 IDD2N, IDD2NA, IDD2NL, IDD2NG, IDD2ND, IDD2N_par, IPP2, IDD3N, IDD3NA and IDD3P Measurement-Loop Pattern ...56
10.1.4 IDD2NT and IDDQ2NT Measurement-Loop Pattern.....................................................................................56
10.1.5 IDD4R, IDDR4RA, IDD4RB and IDDQ4R Measurement-Loop Pattern1 ..............................................................57
10.1.6 IDD4W, IDDR4WA, IDD4WB and IDD4W_par Measurement-Loop Pattern...........................................................58
10.1.7 IDD4WC Measurement-Loop Pattern ......................................................................................................59
10.1.8 IDD5B Measurement-Loop Pattern.........................................................................................................60
10.1.9 IDD7 Measurement-Loop Pattern ..........................................................................................................60
10.2 IDD Specifications .........................................................................................................................................62
11
12
INPUT/OUTPUT CAPACITANCE...................................................................................................................64
ELECTRICAL CHARACTERISTICS AND AC TIMING..................................................................................66
12.1 Reference Load for AC Timing and Output Slew Rate ...............................................................................66
12.2 tREFI ..............................................................................................................................................................66
12.3 Clock Specification ......................................................................................................................................66
12.3.1 Definition for tCK (ABS).............................................................................................................................66
12.3.2 Definition for tCK (avg)..............................................................................................................................67
12.3.3 Definition for tCH (avg) and tCL (avg) ...........................................................................................................67
12.3.4 Definition for tERR (nper) ...........................................................................................................................67
12.4 Timing Parameters by Speed Grade...........................................................................................................68
12.4.1 Timing Parameters by Speed Bin for DDR4-1600 to 2400..................................................................68
DS-00855-GDQ2A8AA-Rev1.4
3
2023/6/25
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