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FX818 PDF预览

FX818

更新时间: 2022-04-01 09:21:10
品牌 Logo 应用领域
CMLMICRO /
页数 文件大小 规格书
26页 672K
描述
CTCSS SIGNALLING PROCESSOR

FX818 数据手册

 浏览型号FX818的Datasheet PDF文件第20页浏览型号FX818的Datasheet PDF文件第21页浏览型号FX818的Datasheet PDF文件第22页浏览型号FX818的Datasheet PDF文件第23页浏览型号FX818的Datasheet PDF文件第24页浏览型号FX818的Datasheet PDF文件第26页 
CTCSS Signalling Processor  
FX818  
1.7.1 Electrical Performance (continued)  
Timing Diagrams  
Figure 4 "C-BUS" Timing  
For the following conditions unless otherwise specified:  
Xtal Frequency = 4.032MHz, V = 3.3V to 5.0V, Tamb = -40°C to +85°C.  
DD  
Parameter  
Notes  
Min.  
2.0  
4.0  
-
Typ.  
Max.  
Units  
t
t
t
t
t
t
"CS-Enable to Clock-High"  
Last "Clock-High to CS-High"  
"CS-High to Reply Output 3-state"  
"CS-High" Time between transactions  
"Inter-Byte" Time  
-
µs  
µs  
µs  
µs  
µs  
µs  
CSE  
CSH  
HIZ  
-
2.0  
-
2.0  
4.0  
2.0  
CSOFF  
NXT  
CK  
-
"Clock-Cycle" time  
-
Notes: 1. Depending on the command, 1 or 2 bytes of COMMAND DATA are transmitted to the peripheral  
MSB (Bit 7) first, LSB (Bit 0) last. REPLY DATA is read from the peripheral MSB (Bit 7) first, LSB  
(Bit 0) last.  
2. Data is clocked into and out of the peripheral on the rising SERIAL CLOCK edge.  
3. Loaded commands are acted upon at the end of each command.  
4. To allow for differing µController serial interface formats "C-BUS" compatible ICs are able to work  
with either polarity SERIAL CLOCK pulses.  
ã 1997 Consumer Microcircuits Limited  
25  
D/818/4  

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