Datasheet > FSA2267L10X_NL

FSA2267L10X_NL

更新时间： 2024-01-14 03:11:58

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		光电二极管
页数	文件大小	规格书
14页	1489K
描述
SPDT, 2 Func, 1 Channel, CMOS, 1.60 X 2.10 MM, LEAD FREE, MO-255UABD, MICROPAK-10

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FSA2267L10X_NL 技术参数

生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	VQCCN,	针数：	10
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.79	模拟集成电路 - 其他类型：	SPDT
JESD-30 代码：	R-XQCC-N10	JESD-609代码：	e4
长度：	2.1 mm	负电源电压最大值（Vsup）：	-6 V
负电源电压最小值（Vsup）：		标称负供电电压 (Vsup)：	-4.5 V
信道数量：	1	功能数量：	2
端子数量：	10	标称断态隔离度：	44 dB
通态电阻匹配规范：	0.04 Ω	最大通态电阻 (Ron)：	0.75 Ω
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	VQCCN
封装形状：	RECTANGULAR	封装形式：	CHIP CARRIER, VERY THIN PROFILE
认证状态：	Not Qualified	座面最大高度：	0.55 mm
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	1.65 V
标称供电电压 (Vsup)：	2.3 V	表面贴装：	YES
最长断开时间：	18 ns	最长接通时间：	37 ns
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	NICKEL GOLD	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	1.6 mm	Base Number Matches：	1

FSA2267L10X_NL 数据手册

ESD Protection

ESD Performance of the FSA2267/FSA2267A

FSA2267

■ HBM all pins 7.0kV

■ CDM all pins 1.0kV

FSA2267A

■ HBM all pins 7.5kV

■ CDM all pins 1.0kV

Figure 5. Human Body ESD Test Model

Human Body Model

Figure 5 shows the schematic representation of the

Human Body Model ESD event. Figure 6 is the ideal

waveform representation of the Human Body Model. The

device is tested to JEDEC: JESD22-A114 Human Body

Model.

Charged Device Model

In manufacturing test and handling environments, a

more useful model is the Charged Device Model and the

FSA2267/FSA2267A has a very good ESD immunity to

this model. The device is tested to JEDEC: JESD22-

C101 Charged Device Model.

Figure 6. HBM Current Waveform

IEC 61000-4-2

The IEC 61000-4-2 standard covers ESD testing and

performance of finished equipment and evaluates the

equipment in its entirety for ESD immunity. Fairchild

Semiconductor has evaluated this device using the

IEC 6100-4-2 representative system model depicted in

Figure 7.

ESD values measured via the IEC 61000-4-2 evaluation

method are influenced by the specific board layout,

board size, and many other factors of the manufacturer’s

product application. Measured system ESD values can-

not be guaranteed by Fairchild Semiconductor to exactly

correlate to a manufacturer’s in-house testing due to

these application environment variables. Fairchild Semi-

conductor has been able to determine that, for ultra-por-

table applications, an enhanced ESD immunity, relative

to the IEC 61000-4-2 specification, can be achieved with

the inclusion of a 100Ω−series resistor in the V_CCsupply

path to the analog switch (see Figure 8). Typical

improvements of between 3-6kV of ESD immunity (I/O to

GND) have been measured with the inclusion of the

resistor with the IEC 61000-4-2 representative model.

For more information on ESD testing methodologies,

please refer to:

Figure 7. IEC 61000-4-2 ESD Test Model

Analog Switch Supply Rail

100

V_CC

1B₀

1B₁

2B₀

2B₁

AN-6019 Fairchild Analog Switch Products ESD Test

Methodology Overview

http://www.fairchildsemi.com/an/AN/AN-6019.pdf.

ESD Event

Additional ESD Test Conditions

For information regarding test methodologies and perfor-

mance levels, please contact Fairchild Semiconductor.

Ultra-portable Connector

Figure 8. ESD Immunity with 100Ω Resistor

FSA2267 / FSA2267A Rev. 1.0.4

www.fairchildsemi.com

1 2 345 6 7...14

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